Electricity: electrical systems and devices – Safety and protection of systems and devices – With specific current responsive fault sensor
Reexamination Certificate
1999-04-30
2001-04-17
Sherry, Michael J. (Department: 2836)
Electricity: electrical systems and devices
Safety and protection of systems and devices
With specific current responsive fault sensor
C361S104000, C307S011000
Reexamination Certificate
active
06219215
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to fuse structures in integrated circuits, and specifically, to a novel thermal fuse device and circuit architecture for providing thermal protection of semi-conductor chips and circuit structures.
2. Discussion of the Prior Art
Thermal runaway may occur in integrated circuit chips/devices due to the following reasons: 1) during a chip/device “burn-in ” performed at high temperature (e.g., 140° C.-150° C.); 2) voltages above 1.5× operating voltages; or 3) if the chips go into latchup. Also, chips can experience current runaway, with accompanying heating and destruction when operating in systems.
While current fuse devices are manufactured as elements in semiconductor devices, i.e., IC chips, they are predominantly large and cumbersome requiring application of a laser stimuli for their fuse blowing. Typically, these fuses are applied in circuit trimming applications and/or removing unwanted or defective circuits prior to chip packaging. Currently, there is no thermal fuse protection device that is designed to protect integrated circuit devices from thermal run-away, latch-up, and over-current conditions during normal operation, and, that is capable of being blown at a pre-determined operating condition, e.g., a specified current and/or voltage level, for instance.
U.S. Pat. No. 4,272,753 discusses a method for fabricating a discrete metallic fuse device using fusible material which is necked to a narrow region. The fusible material is separated from an insulative layer by an air gap which provides lower thermal conductivity environment.
U.S. Pat. No. 4,089,734 discusses a metallic fuse device for read only memory and memory reconfiguration applications which involves a complicated technique including a four layer deposition of metallizations, requires the etching at two sides of a fusible link layer to form the resultant fusible link, and etching of the silicon substrate material to form a mesa structure.
U.S. Pat. No. 4,879,587 discusses manufacture of a metallic fuse device that is provided on top of a supporting insulating bridge structure for connecting two conductive regions.
The manufacture of each of the fuse devices described in the above-mentioned prior art is generally complicated requiring many processing steps. Additionally, they are treated as discrete elements, and are not integral with the conducting line itself. Further, these prior art fuse devices are not configured to destruct according to a designed voltage and current operating condition, and, do not readily detect thermal runaway phenomena that may occur in integrated circuits.
Accordingly, it would be highly desirable to provide a novel electrical fuse structure for integrated circuits that comprises actual conductive chip wiring and that may be easily blown at a specified voltage and current level, and, that may be used to provide thermal runaway and over-current protection for integrated circuit devices and structures.
It would additionally be highly desirable to provide a novel electrical fuse structure for integrated circuits that are defined by the designer and tailored to the capacity of currents they must carry.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a novel electrical fuse structure for integrated circuits that comprises actual conductive chip wiring and, that may be used to provide thermal runaway protection and over-current protection for semi-conductor circuit devices and structures.
It is another object of the present invention to provide a novel high-performance signal line structure in integrated circuits having a locally minimized thermal conduction path below a conductor to the silicon substrate to enable a more controlled fusing activation at lower current and voltage levels.
Such fuses prevent excessive current/thermal build-up in the chip, even in case of a catastrophic event such as latchup, and enables immediate corrective action in case such an excessive current/thermal build-up condition is detected. The chip is self protected, and cannot damage the board, power supply, other chips, etc.
According to the principles of the invention, there is provided a current overload protection system for an integrated circuit chip having a power source comprising a current monitoring device for monitoring current between the power source and a node of an integrated circuit device in the chip, the current monitoring device existing in a first operating state when the current is at or below a predetermined value and existing in a second operating state when the current exceeds the predetermined value indicating current overload condition; and, a voltage detection circuit responsive to the first operating state of the current monitoring device for deactivating implementation of a second integrated circuit device in the chip that permits corrective action of the overload condition, and, responsive to the second operating state for activating the second integrated circuit device for enabling continuous operation of the integrated circuit chip.
Preferably, the invention employs a gap conducting structure for the integrated electronic circuit that functions as an electronic fuse device and that is integrated as part of the semi-conductor chip wiring for providing over-current and thermal runaway protection. The gap conducting structure includes one or more air gap regions of predefined volume that fully or partially exposes a length of interlevel conductor layer in an IC. Alternately, the air gap region may be wholly located within the dielectric region below a corresponding conductor and separated by insulator. When functioning as a fuse, the gap region acts to reduce thermal conductivity away from the exposed portion of the conductor enabling generation of higher heat currents in the conducting line with lower applied voltages sufficient to destruct a part of the partially exposed/fully exposed conducting line, thus preventing thermal runaway and over-current condition. The presence of gaps, and hence, the fuses, are scalable and may be defined by the designer and tailored to the capacity of currents they must carry.
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Bertin Claude Louis
Hedberg Erik Leigh
Sullivan Timothy Dooling
Tonti William Robert
Huynh Kim
International Business Machines - Corporation
Scully Scott Murphy & Presser
Sherry Michael J.
Walter, Jr. Howard J.
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