Chip stacking and capacitor mounting arrangement including space

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

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Details

257686, 257777, 361782, 361783, 361735, H01L 2349, H05K 702

Patent

active

060057785

ABSTRACT:
Chip stacking and capacitor mounting arrangement including a planar spacer separating a first die and a second die. A conductive spacer provides for backside chip grounding in one application and provides for capacitor mounting in another application.

REFERENCES:
patent: 4996587 (1991-02-01), Hinrichsmeyer et al.
patent: 5012323 (1991-04-01), Farnworth
patent: 5019943 (1991-05-01), Fassbender et al.
patent: 5049676 (1991-09-01), Demmin et al.
patent: 5291061 (1994-03-01), Ball
patent: 5323060 (1994-06-01), Fogal et al.
patent: 5399898 (1995-03-01), Rostoker
patent: 5422435 (1995-06-01), Takiar et al.

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