Chip-stacked semiconductor device and manufacturing method...

Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Including isolation structure

Reexamination Certificate

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C438S348000, C438S454000, C438S456000, C438S458000, C438S459000, C438S464000, C438S692000, C438S977000, C257SE21020, C257SE21244, C257SE21507, C257SE21546, C257SE23011, C257SE23114

Reexamination Certificate

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07943470

ABSTRACT:
The semiconductor device according to the present invention includes a through electrode that penetrates through a silicon substrate, an isolation trench provided to penetrate through the silicon substrate to surround the through electrode, a silicon film in contact with an inner surface of the isolation trench, a silicon film in contact with an outer surface of the isolation trench, and an insulation film provided between the silicon films. According to the present invention, the silicon film within the isolation trench can be substantially regarded as a part of the silicon substrate. Therefore, even when the width of the isolation trench is increased to increase the etching rate, the width of the insulation film becoming a dead space can be made sufficiently small. Consequently, the chip area can be decreased.

REFERENCES:
patent: 2007/0069364 (2007-03-01), Kawano et al.
patent: 2006-261403 (2006-09-01), None

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