Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate
2008-04-14
2010-02-09
Le, Vu A (Department: 2824)
Static information storage and retrieval
Addressing
Plural blocks or banks
C710S105000
Reexamination Certificate
active
07660185
ABSTRACT:
A chip select controller for a non-volatile memory device includes a first chip enable signal transfer unit, a second chip enable signal transfer unit, a first chip select pad, a second chip select pad, a third chip select pad and a chip select unit. The first chip enable signal transfer unit buffers first and second chip enable signals according to a control signal. The second chip enable signal transfer unit buffers third and fourth chip enable signals according to the control signal. The first chip select pad is configured to transfer a first chip select signal. The second chip select pad is configured to transfer a second chip select signal. The third chip select pad is configured to transfer the second chip select signal. The chip select unit addresses a specific chip according to the first chip select signal and the second chip select signal.
REFERENCES:
patent: 5673398 (1997-09-01), Takeda
patent: 2005-209814 (2005-08-01), None
patent: 2005-285295 (2005-10-01), None
patent: 1020000056711 (2000-09-01), None
patent: 1020010063182 (2001-07-01), None
Hynix / Semiconductor Inc.
Le Vu A
Townsend and Townsend / and Crew LLP
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