Chip piezoelectric filter

Details Chip piezoelectric filter Chip piezoelectric filter

2000-07-28

2001-08-14

Enad, Elvin (Department: 2834)

Electrical generator or motor structure

Non-dynamoelectric

Piezoelectric elements and devices

C310S323090, C310S340000, C310S348000, C310S367000

Reexamination Certificate

active

06274969

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a chip piezoelectric filter that has a circuit configuration wherein a plurality of piezoelectric filter sections are electrically connected. More specifically, the present invention relates to a chip piezoelectric filter that has a configuration wherein each of a plurality of piezoelectric substrates has an energy-trap piezoelectric filter section provided thereon.
2. Description of the Related Art
In an intermediate-frequency stage filter of a mobile communication apparatus, such as a portable telephone, a piezoelectric filter of an energy-trap type is used. As with other electronic components, the piezoelectric filter of this type is also required to be configured as a chip component to enable surface-mounting.
An example of the piezoelectric filter of this type is disclosed in Japanese Unexamined Patent Application Publication No. 10-335976.
FIGS. 7 and 8
show the conventional piezoelectric filter.
A piezoelectric filter
50
has a first piezoelectric substrate
51
and a second piezoelectric substrate
52
that are stacked on each other and separated from each other via a spacer
58
. On each of the first and second piezoelectric substrate
51
and
52
, an energy-trap piezoelectric filter section is provided. Also, a pair of resonant electrodes
53
a
and
53
b
is provided on the upper surface of the first piezoelectric substrate
51
, and a common electrode (not shown) is arranged opposite to the resonant electrodes
53
a
and
53
b
with respect to the front and reverse surfaces thereof. The resonant electrodes
53
a
and
53
b
and the common electrode provide the energy-trap piezoelectric filter section that vibrates in a expansion oscillation mode.
On the upper surface of the second piezoelectric substrate
52
, a common electrode
53
c
is provided. Similar to the first piezoelectric substrate
51
, a pair of resonant electrodes (not shown) are arranged to oppose the common electrode
53
c
with respect to the front and reverse surfaces thereof. The pair of electrodes and the common electrode
53
c
define a second energy-trap piezoelectric filter section.
An opening
58
a
is provided in the spacer
58
to prevent interference of vibration of the energy-trap piezoelectric filter section. Also, confining substrates
60
and
61
are, respectively, stacked on outer main surfaces of the first and second piezoelectric substrates
51
and
52
via spacers
57
and
59
.
The spacers
57
and
59
have an opening
57
a
and an opening
59
a
, respectively. The openings
57
a
and
59
a
are arranged to define cavities that prevent interference of vibrations of the first and second piezoelectric filter sections of the energy-trap type. Specifically, as shown in
FIG. 8
, a first cavity X, a second cavity Y, and a third cavity Z are provided. The first cavity X is provided between the first and second piezoelectric substrates
1
and
2
. The second cavity Y is provided with the spacer
57
on an upper portion of the first piezoelectric substrate
51
. The third cavity Z is provided with the spacer
59
in a lower portion of the second piezoelectric substrate
52
. The sizes of the cavities X, Y, and Z are the same.
The described energy-trap piezoelectric filter is used as a bandpass filter that is required to reduce unnecessary spurious components of attenuation-frequency characteristics.
However, the energy-trap piezoelectric filter frequently produces large spurious components in areas close to passbands.
SUMMARY OF THE INVENTION
In order to solve the above-described problems, preferred embodiments of the present invention provide a chip piezoelectric filter that has a plurality of energy-trap filter sections and that effectively minimizes unnecessary spurious components, thereby achieving excellent passband characteristics.
According to one preferred embodiment of the present invention, a chip piezoelectric filter includes a first piezoelectric substrate on which a first energy-trap piezoelectric filter section is provided, a second piezoelectric substrate on which a second energy-trap piezoelectric filter section, a spacer that is stacked between the first piezoelectric substrate and the second piezoelectric substrate and that has an opening to define a first cavity arranged to prevent interference of vibrations of the first energy-trap piezoelectric filter section and the second energy-trap piezoelectric filter section, a first confining substrate stacked on a surface of the first piezoelectric substrate, which opposes the surface on which the spacer is stacked, to define a second cavity arranged to prevent interference of vibrations of the first piezoelectric filter section, and a second confining substrate stacked on a surface of the second piezoelectric substrate, which opposes the surface on which the spacer is stacked, to define a third cavity arranged to prevent interference of vibrations of the second piezoelectric filter section. In the preferred embodiment described above, the area of the first cavity is larger than the area of each of the second cavity and the third cavity.
As described above, the first and second piezoelectric substrates have the first and second energy-trap piezoelectric filter sections, respectively. These substrates are stacked to define the first cavity therebetween. Also, the confining substrates are individually stacked on outer main surfaces of the first and second piezoelectric substrates to define the second and third cavities. The area of the first cavity is preferably larger than the area of each of the second and third cavity. According to this configuration, unnecessary spurious components are effectively reduced and minimized.
Thus, enlarging the area of first cavity enables the chip piezoelectric filter to produce filter characteristics that are much better than those produced by the conventional chip piezoelectric filter.
A chip piezoelectric filter according to another preferred embodiment of the present invention further includes first and second spacers that are created by dividing the aforementioned spacer in the thickness direction, and a partitioning substrate that is provided between the first spacer and the second spacer and that has no opening. In this case, the partitioning substrate reduces interference between the first and second piezoelectric filter sections, thereby enabling unnecessary spurious components to be substantially minimized.
A chip piezoelectric filter according to still another preferred embodiment of the present invention preferably includes a circuit configuration wherein the first piezoelectric filter section and the second piezoelectric filter section are electrically connected to each other via an intermediate capacitive section, and an intermediate capacitive section provided on at least one of the first piezoelectric substrate and the second piezoelectric substrate. In this case, the first and second piezoelectric substrates are stacked in the thickness direction. Therefore, the circuit configuration wherein the multiple piezoelectric filters are connected to each other via the intermediate capacitive section is configured as a small independent component.
Also, in the above-described chip piezoelectric filter according to preferred embodiments of the present invention, the intermediate capacitive section may be provided with a pair of electrodes opposing each other with respect to the front and reverse surfaces via one of the first piezoelectric substrate and the second piezoelectric substrate.
As described above, the intermediate capacitive section is provided on at least one of the first and second piezoelectric substrates. That is, the intermediate capacitive section is provided on the same substrate on which the piezoelectric filter section is also provided. Therefore, there is very little difference between temperature characteristics of the intermediate capacitive section and the piezoelectric filter section, thereby providing stabilized temperature characteristics of the overall chip piezoele

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