Chip packaging structure having redistribution layer with...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads

Reexamination Certificate

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C257SE23021, C257SE23069, C257SE23020, C257SE23179, C257S734000, C257S737000, C257S758000, C257S781000, C257S782000, C257S783000, C257S773000, C257S772000, C257S774000, C257S780000, C257S761000, C257S766000, C257S764000, C257S765000, C257S763000

Reexamination Certificate

active

10709953

ABSTRACT:
A chip structure comprising a chip, a redistribution layer, a second passivation layer and at least a bump is provided. The chip has a first passivation layer and at least a bonding pad. The first passivation layer exposes the bonding pad and has at least a recess. The redistribution layer is formed over the first passivation layer and electrically connected to the bonding pad. Furthermore, the redistribution layer also extends from the bonding pad to the recess. The second passivation layer is formed over the first passivation layer and the redistribution layer. The second passivation layer also has an opening that exposes the redistribution layer above the recess. The bump passes through the opening and connects electrically with the redistribution layer above the recess.

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