Chip package structure

Details Chip package structure Chip package structure

2005-08-31

2008-11-04

Thai, Luan (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Insulating material

C257S706000, C257S707000, C257S718000, C257S719000, C257S720000, C257SE23128, C257SE23193, C438S121000, C438S122000

Reexamination Certificate

active

07446407

ABSTRACT:
A chip package structure includes a substrate, a chip, a first B-stage adhesive, bonding wires, a heat sink and a molding compound. The substrate comprises a first surface, a second surface and a through hole. The chip is arranged on the first surface of the substrate and electrically connected thereto while the through hole of the substrate exposes a portion of the chip. The first B-stage adhesive is arranged between the chip and the first surface of the substrate, and the chip is attached to the substrate through the first B-stage adhesive. The bonding wires are connected between the chip exposed by the through hole and second surface of the substrate. The heat sink is arranged on the first surface of the substrate, covering the chip. The molding compound is arranged on the second surface of the substrate, covering a portion of the substrate and bonding wires.

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