Chip package board having utility rings

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

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Details

257692, 257782, H01L 2352, H01L 2348

Patent

active

058014403

ABSTRACT:
A chip package includes a circuit board having a first surface with an inner die-attach region, an outer signal trace region and an intermediate utility region. Within the utility region are a number of traces for providing fixed electrical potentials to an integrated circuit die mounted within the die-attach region. In the preferred embodiment, the utility region includes a ring-like ground trace, a V.sub.DD trace and a segmented outer trace, with the segments of the segmented trace being connected to at least two fixed voltages for operating the integrated circuit die. Bond wires or leads of a leadframe include inner wire/lead ends connected to input/output pads of the die and include outer wire/lead ends connected to either a trace or trace segment in the utility region or a signal trace located in the outer signal trace region. The resulting chip package may be of the ball grid array type.

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patent: 5221417 (1993-06-01), Basavanhally
patent: 5241133 (1993-08-01), Mullen, III et al.
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patent: 5386141 (1995-01-01), Liang et al.
patent: 5490324 (1996-02-01), Newman
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patent: 5530287 (1996-06-01), Currie et al.

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