Chip package and process for forming the same

Details Chip package and process for forming the same Chip package and process for forming the same

2006-07-18

2006-07-18

Pham, Long (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Housing or package filled with solid or liquid electrically...

C257S690000, C257S693000, C257S702000, C257S703000, C257S738000, C257S789000, C257S793000

Reexamination Certificate

active

07078794

ABSTRACT:
A chip package structure comprising a substrate, a chip, a plurality of bumps, a plurality of conductive wires and an insulating material is provided. The substrate has a first surface and a corresponding second surface. The substrate has a slot that penetrates the substrate. The chip is attached to the first surface of the substrate in a position that covers the slot. The conductive wires pass through the slot such that one end of each conductive wire is attached to a contact point on the chip while the other end of the conductive wire is attached to a contact point on the second surface of the substrate. The insulating material fills the space between the chip and the substrate and the slot so that the conductive wires and the bumps are enclosed.

REFERENCES:
patent: 6218731 (2001-04-01), Huang et al.
patent: 6528408 (2003-03-01), Kinsman

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