Chip package

Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks

Reexamination Certificate

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Details

C438S401000, C257SE23001, C257SE23179, C257SE21525

Reexamination Certificate

active

07626278

ABSTRACT:
A chip package including a substrate, a chip and a mark is provided. The substrate has a carrying surface. A mark region is disposed on the carrying surface. The chip is disposed on the carrying surface and electrically connected to the substrate. The mark is disposed in the mark region for recording a process parameter.

REFERENCES:
patent: 5256578 (1993-10-01), Corley et al.
patent: 6468813 (2002-10-01), Chao et al.
patent: 2006/0128040 (2006-06-01), Chen et al.

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