Chip operating conditions compensated clock generation

Pulse or digital communications – Synchronizers – Frequency or phase control using synchronizing signal

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375373, 375376, 327291, 327298, 327113, 327114, 327144, 327153, 327161, 327162, H04L 704, H03D 324, G06F 104, H03K 300

Patent

active

060849339

ABSTRACT:
A clock generating system used to generate a clock signal which compensates for chip operating conditions. The system includes a delay line oscillator and a reference clock which determines the actual propagation time of delay elements on the chip. A clock generator which includes a number of serially connected delay units uses this information to generate a clock signal for the chip logic functions. The output clock rums the chip logic functions at the proper frequency for the current chip conditions.

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