Chip on chip semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S777000

Reexamination Certificate

active

06635962

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a semiconductor device of what is called a chip on chip (hereinafter, abbreviated as COC) type semiconductor device, in which a plurality of semiconductor chips are electrically connected so that they face each other and a method for manufacturing the same. More particularly, the invention relates to a semiconductor device using multiple chips, in which a plurality of second semiconductor chips are directly connected on the surface of a first semiconductor chip while an interconnection for connecting the second semiconductor chips can be freely changed without depending on internal design of the first semiconductor chip.
BACKGROUND OF THE INVENTION
Conventionally, in the case of constructing a semiconductor device by combining circuits such as a memory device and its logic circuit, for reduction in an area occupied by forming the circuits three-dimensionally, reduction in parasitic capacity of an RF circuit or the like, generalization of a part of a circuit (for example, a memory device portion is generalized and a driving circuit portion is changed according to an application), and a case where the circuits cannot be formed on one chip due to different fabrication parameters of the circuits, a semiconductor device of the COC type having the structure that a semiconductor circuit is fabricated by a plurality of chips and a semiconductor chip (child chip) is connected onto another semiconductor chip (parent chip) may be used. In recent years, there is a tendency that a multi-chip device in which a plurality of child chips are provided as shown in
FIG. 12
is used.
In
FIG. 12
, electrode terminals
22
of second semiconductor chips (child chips)
2
a
and
2
b
are connected onto electrode terminals
12
on a first semiconductor chip (parent chip)
1
via bump electrodes
11
and
21
, respectively. The parent chip
1
is bonded to an island (not shown) constructed by a lead frame. Electrode pads (not shown) provided on the peripheral side of the parent chip
1
are electrically connected to leads (not shown) provided around the island via wires such as metal wires, and the periphery is molded by a resin (not shown). Reference numeral
17
denotes a passivation film.
As described above, in the semiconductor device of the COC type, the parent chip
1
and child chips
2
a
,
2
b
are connected to each other via the bump electrodes
11
and
21
or the like provided on the electrode terminals. The semiconductor device is connected to external leads via the wires and the electrode pads provided around the parent chip
1
. Signals are therefore transmitted between the parent chip
1
and the child chips
2
via bump electrodes. However, in the case where signals are transmitted between the plurality of child chips
2
a
and
2
b
, an interconnection is formed in a semiconductor layer or in an insulating film in the surface of the semiconductor layer of the parent chip
1
, and end parts of the interconnection are exposed as electrode terminals from the insulating film and connected to the electrode terminals of the child chips.
As described above, in the case of transmitting signals between the parent chip and the child chip in the semiconductor device of the COC type, it is sufficient to connect the electrode pads of the parent chip and the child chip via the bump electrodes. However, in the case where signals are transmitted among a plurality of child chips, signals have to be transmitted via the interconnection formed in the parent chip. Even in the case where the parent chip or the like is generalized and a circuit according to an application is formed by child chips, an interconnection has to be formed in the parent chip in accordance with the child chips to be mounted. There is consequently a problem such that generalization of the parent chip is limited.
Further, in the case where signals have to be transmitted from the outside to one of child chips, signals have to be transmitted to the child chip via the electrode pad and the interconnection in the parent chip. It hinders the generalization of the parent chip.
Further, since the parent chip and child chips are connected via bump electrodes made of Au or the like, if the connecting work is not performed at a high temperature such as 450° C., excellent electric connection cannot be obtained. In this case, however, the semiconductor substrate is also heated to the high temperature and pressure applied on the bump electrodes is also applied on the semiconductor substrate, so that circuit elements cannot be formed under the bump electrodes on both of the chips. It causes a problem that the efficiency of using the semiconductor substrate deteriorates.
SUMMARY OF THE INVENTION
The present invention has been achieved in consideration of such circumstances and an object thereof is to provide a semiconductor device of a COC type in which, while obtaining generalization of a first semiconductor chip, a signal can be transmitted/received between second semiconductor chips formed on the first semiconductor chip without changing design in the first semiconductor chip of the semiconductor device and a method for manufacturing the semiconductor device.
Another object of the present invention is to provide a semiconductor device in which a signal can be transmitted from the outside directly to a child chip connected on a parent chip via an electrode pad of the parent chip while using the generalized parent chip without forming a special interconnection in a semiconductor layer or an insulating layer of the parent chip.
Further another object of the present invention is to provide a semiconductor device having sufficiently increased packing density by making it possible to form circuit elements also in a semiconductor layer under electrode terminals by preventing a high pressure from being applied on a bump electrode at high temperature at the time of connecting a parent chip and a child chip.
Further another object of the present invention is to provide a semiconductor device having improved packing density by making it possible to form a device also under an electrode pad by preventing excessive increase in temperature and application of a pressure with an ultrasonic wave or the like when a wire such as a metal wire for performing wire bonding and an electrode pad are bonded to each other.
According to the present invention, there is provided a semiconductor device in which a plurality of second semiconductor chips are connected to the surface side of a first semiconductor chip via electrode terminals provided on each of the first semiconductor chip and the second semiconductor chip, wherein an interconnection for directly connecting electrode terminals of two second semiconductor chips out of the plurality of second semiconductor chips is formed on the surface of a passivation film of the first semiconductor chip. The semiconductor chip includes not only a semiconductor integrated circuit (IC) but also a discrete part such as a transistor, diode, or capacitor. The substrate is not limited to a silicon substrate or a semiconductor substrate of GaAs or the like, but other substrates on which electronic parts are formed can be also used.
With the structure, since the interconnection is formed on the surface of the passivation film, even when the connection between the second semiconductor chips mounted on the larger first semiconductor chip varies, it is unnecessary to fabricate the semiconductor device by changing the design of the first semiconductor chip. At the time of forming a bump electrode or a metal film which can be bonded to the bump electrode of the second semiconductor chip on the electrode terminal on the surface, the interconnection for connecting necessary electrode terminals can be formed by using the material of the bump electrode or the metal film, and desired connection can be made. Consequently, even in the case of changing the second semiconductor chip or the structure of connection between the second semiconductor chips, a generalized chip as the first semicond

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Chip on chip semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Chip on chip semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Chip on chip semiconductor device will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3135156

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.