Chip on board package with top and bottom terminals

Details Chip on board package with top and bottom terminals Chip on board package with top and bottom terminals

1996-12-18

1998-03-24

Picardat, Kevin

Fishing, trapping, and vermin destroying

437209, 437217, 437219, H01L 2160

Patent

active

057312273

ABSTRACT:
An integrated circuit package of this invention includes a series of nonconductive rigid substrates, each substrate having a pattern of generally coplanar bond fingers embedded thereupon. An integrated circuit die is connected to individual bond fingers of varying bond finger patterns. Individual bond fingers are connected to package terminals by medial leads, which are generally perpendicular to the bond finger patterns. Semiconductor die packages having both top and bottom package terminals are thus produced. Methods and devices are shown.

REFERENCES:
patent: 4475007 (1984-10-01), Ohno
patent: 4769272 (1988-09-01), Byrne et al.
patent: 5206188 (1993-04-01), Hiroi et al.
patent: 5240588 (1993-08-01), Uchida
patent: 5340771 (1994-08-01), Rostorer
patent: 5409863 (1995-04-01), Newman
patent: 5556807 (1996-09-01), Bhattacharyya et al.

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