Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package
Reexamination Certificate
2000-09-21
2003-01-21
Cao, Phat X. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
C257S665000, C257S734000, C257S778000, C257S779000, C257S784000
Reexamination Certificate
active
06509634
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a chip mounting structure having an adhesive conductor and a flip chip structure having the same, and more particularly, to a chip mounting structure having an adhesive conductor for electrically connecting a printed circuit board and a chip in a flip chip structure in which the chip is directly mounted on the printed circuit board.
2. Description of the Background Art
Generally, an integrated circuit (IC) device such as a semiconductor chip is fabricated in a package in a manner that when it is mounted on a lead frame as a conductor it is molded by resin. At this time, outer leads of the lead frame are outwardly extended so that it is electrically connected with an electrode layer of a circuit pattern formed on the printed circuit board by soldering.
Meanwhile, recently, in order to follow the current trend that electric and electronic instruments become compact, electronic parts makers increasingly supply set makers with a flip chip where a bare chip element forming an electronic circuit on a silicon wafer is directly mounted on an electrode pad formed on an electronic circuit wiring of the printed circuit board with omission of a typical packaging process. That is so-called SMD (Surface Mounting Device) technology.
A flip chip technique refers to directly mounting a chip on a printed circuit board (PCB), of which construction is as shown in FIG.
1
.
With reference to
FIG. 1
, plural pads
3
are formed on a printed circuit board
1
. On the printed circuit board
1
, a chip
5
(to be described) or other chips or other parts are mounted.
The chip
5
is mounted on the printed circuit board. Plural pads
6
are formed on the lower portion of the chip
5
. The pads
6
and the pads
3
formed on the printed circuit board
1
and the chip
5
serve to electrically connect the chip
5
and the printed circuit board
1
.
In order to electrically connect the chip
5
and the printed circuit board
1
, when the chip
5
is mounted on the printed circuit board
1
, an adhesive
8
including conductive particles
9
formed at constant intervals in a Z-axis direction (the direction of connecting the chip
5
with PCB
1
) is used in a paste or film state.
As the adhesive
8
, an ACF (anisotropic conductive film), an ACP (anisotropic conductive paste) or ICP (isotropic conductive paste) is used. That is, conductive particles
9
are positioned at constant intervals in the Z-axis direction inside the adhesive
8
, and pressure and heat are applied between the printed circuit board
1
and the chip
5
, thereby connecting the pads
3
and
6
.
The above described flip chip structure of the conventional art has advantages with respect to the technique that the pads
3
of the printed circuit board
1
and the pads
6
of the chip
5
are electrically connected, in that the overall structure can be accomplished to be small and light, a noise caused by an unnecessary connection circuit can be reduced, and its productivity can be improved.
However, the conventional flip chip structure has the following problems.
First, in view of a fabricating technique of the ACF and the ACP, there is no solution to the occurrence of electrical short and open state in the X-Y axis direction. That is, with reference to
FIG. 2
, in the process that the chip
5
is mounted on the printed circuit board
1
by applying pressure and heat, the conductive particles
9
inside the adhesive
8
such as the ACF and the ACP are scattered in the X-Y axis direction, so that electrical short and open state occur.
The electrical open state deteriorates the connection between the pad
3
of the printed circuit board and the pad
6
of the chip, disturbing the smooth flowing of current, while the electrical short causes the pads to be electrically conducted improperly, resulting in a critical damage to the chip.
Therefore, when the electrical short and electrical open state occurs in the process of mounting the chip
5
on the printed circuit board
1
, the high-priced chip
5
is damaged.
Also, as to the conventional art, when the printed circuit board has multiple parts mounted thereon, a heat impact caused due to a difference between the thermal expansive coefficient of the printed circuit board
1
and that of the chip
5
may be applied to the conductive particles
9
, breaking down the connection between the pads
3
and
6
.
SUMMARY OF THE INVENTION
Therefore, an object of the present invention is to provide a chip mounting structure including a conductor which is capable of electrically connecting elements that are formed by layers without electrical shorts and open states.
Another object of the present invention is to prevent a thermal mismatch caused due to a difference of a thermal expansive coefficient between layers in electrically connecting the elements formed by layers.
Still another object of the present invention is to provide a flip chip structure in which a chip is mounted on a printed circuit board by using the conductor.
To achieve these and other advantages in accordance with the purpose of the present invention, as embodied and broadly described herein, there is provided an adhesive conductor including: an adhesive layer having viscoelasticity to release thermal shock caused due to difference of the thermal expansive coefficients between mutually connected layers; and a conductive wire for electrically connecting the layers by vertically penetrating the adhesive layer.
The adhesive layer may be a silicon rubber adhesive in a semi-hardened state or may be constructed by providing upper and lower surfaces of silicon in a hardened state with an adhesive component.
The conductive wire may be vertically formed in a straight line penetrating the adhesive layer, or may vertically penetrate the adhesive layer and be formed bent several times.
It is preferred that a connection portion is formed at both ends of the conductive wire for external connection.
In order to achieve the above objects, there is also provided a chip mounting structure including: a printed circuit board having a curcuit pattern and plural pads; a chip having plural pads and mounted on the printed circuit board; and an adhesive conductor for attaching and electrically connecting the printed circuit board with the chip.
REFERENCES:
patent: 5019944 (1991-05-01), Ishii et al.
patent: 5878486 (1999-03-01), Eldridge et al.
patent: 6078500 (2000-06-01), Beaman et al.
patent: 6204681 (2001-03-01), Nagatsuka et al.
patent: 6229217 (2001-05-01), Fukui et al.
Kim Yong-Il
Lee Sung-Gue
Birch & Stewart Kolasch & Birch, LLP
Cao Phat X.
Doan Theresa T.
LG Electronics Inc.
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