Pulse or digital communications – Spread spectrum – Direct sequence
Reexamination Certificate
2008-01-29
2008-01-29
Ghayour, Mohammed (Department: 2611)
Pulse or digital communications
Spread spectrum
Direct sequence
C375S150000, C375S267000
Reexamination Certificate
active
10783049
ABSTRACT:
Disclosed is a chip-level or a symbol-level equalizer structure for a multiple transmit and receiver antenna architecture system that is suitable for use on the WCDMA downlink. The equalizer structure takes into account the difference in the natures of inter-antenna interference and multiple access interference and suppresses both inter-antenna interference and multiple access interference (MAI). Enhanced receiver performance is achieved with a reasonable implementation complexity. The use of the CDMA receiver architecture, in accordance with this invention, enables the realization of increased data rates for the end user. The CDMA receiver architecture can also be applied in conjunction with space-time transmit diversity (STTD) system architectures.
REFERENCES:
patent: 6259720 (2001-07-01), Buss et al.
patent: 2003/0002568 (2003-01-01), Dabak et al.
patent: 2003/0095585 (2003-05-01), Huh et al.
patent: 2004/0127164 (2004-07-01), Mondragon-Torres et al.
patent: 2004/0165653 (2004-08-01), Jayaraman et al.
patent: 2005/0100052 (2005-05-01), Mailaender et al.
patent: 1289182 (2003-03-01), None
patent: 1357693 (2003-10-01), None
“Chip-Level Channel Equalization in WCDMA Downlink”, Kari Hooli et al., EURASIP Journal on Applied Signal Processing 2002-8, pp. 757-770.
“A Generalized RAKE Receiver for Interference Suppression”, Gregory E. Bottomley, et al., IEEE 2000, pp. 1536-1545.
“V-BLAST: An Architecture for Realizing Very High Data Rates Over the Rich-Scattering Wireless Channel”, P.W. Wolniansky, et al., IEEE 1998, pp. 295-300.
“Polit-aided Adaptive Chip Equalizer Receiver for Interference Suppression in DS-CDMA Forward Link”, Frederik Petre et al., IEEE 2000, pp. 303-308.
Petre, F. et al., “Pilot-aided Adaptive Chip Equalizer Receiver for Interference Suppression in DS-CDMA Forward Link”, IEEE: VTC 2000, pp. 303-308.
“Multi-antenna Transceiver Techniques for 3G and Beyond”, Ari Hottinen et al., John Wiley & Sons, Chichester, UK, 2003, pp. 123-131.
Hooli Kari
Juntti Markku
Kiiskilä Kai
Ylioinas Jari
Ghayour Mohammed
Harrington & Smith PC
Matin Nurul M
Nokia Corporation
LandOfFree
Chip-level or symbol-level equalizer structure for multiple... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Chip-level or symbol-level equalizer structure for multiple..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Chip-level or symbol-level equalizer structure for multiple... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3926777