Chip-lead interconnection structure in a semiconductor device

Details Chip-lead interconnection structure in a semiconductor device Chip-lead interconnection structure in a semiconductor device

1997-10-29

2000-01-18

Monin, Jr., Donald L.

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

257670, 257676, H01L 23495

Patent

active

060160039

ABSTRACT:
In a semiconductor device, a lead frame includes normal leads terminating before an edge of a semiconductor chip and LOC leads extending over the semiconductor chip. The semiconductor chip is fixed to the lead frame by adhering the semiconductor chip to stitch sections of the LOC leads through an adhesive tape. A power supply pin and a ground pin are formed of LOC leads having a plurality of stitch sections, which are connected to a plurality of corresponding bonding pads, respectively, through bonding wires. On the other hand, signal pins are formed of normal leads which are connected to corresponding bonding pads through bonding wires, respectively.

REFERENCES:
patent: 4943843 (1990-07-01), Okinaga et al.
patent: 5287000 (1994-02-01), Takahashi et al.
patent: 5545920 (1996-08-01), Russell
patent: 5717246 (1998-02-01), Brooks et al.

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