Chip layout of semiconductor integrated circuit

Details Chip layout of semiconductor integrated circuit Chip layout of semiconductor integrated circuit

1997-11-24

1999-09-14

Hardy, David B.

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

With particular power supply distribution means

257672, 257723, H01L 27118

Patent

active

059526840

ABSTRACT:
A chip layout of a semiconductor integrated circuit, includes a plurality of device patterns that are designed to form a semiconductor substrate having a single power supply; and a metal wiring pattern, which is to be formed on the semiconductor substrate. The metal wiring pattern is divided into plural parts to provide a plurality of power-supply channels.

REFERENCES:
patent: 5315182 (1994-05-01), Sakashita et al.
patent: 5319243 (1994-06-01), Leicht et al.
patent: 5488256 (1996-01-01), Tsunoda
patent: 5654590 (1997-08-01), Kuramochi
patent: 5726500 (1998-03-01), Duboz et al.
patent: 5828108 (1998-10-01), Toyoda

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