Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having substrate registration feature
Reexamination Certificate
2011-05-24
2011-05-24
Menz, Laura M (Department: 2813)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Having substrate registration feature
C430S394000, C257SE23179
Reexamination Certificate
active
07947563
ABSTRACT:
A chip forming position specifying method for applying chip IDs indicative of positions on a wafer where semiconductor chips are formed, and thereby specifying their positions. In the chip forming position specifying method, different marks are formed for every chip in a transfer mask (hereinafter called “mark forming mask”) used to form a wiring layer, in addition to normal functional wirings. The positions of the chips on the wafer are respectively specified according to combinations of the marks of a plurality of the mark forming masks, which have been transferred onto the wafer.
REFERENCES:
patent: 5451479 (1995-09-01), Ishibashi
patent: 6620557 (2003-09-01), Hosono et al.
patent: 6849957 (2005-02-01), Takeuchi et al.
patent: 6924090 (2005-08-01), Hirooka
patent: 7348682 (2008-03-01), Brambilla et al.
patent: 05-175093 (1993-07-01), None
Kim Sun M
Menz Laura M
Oki Semiconductor Co., Ltd.
Volentine & Whitt P.L.L.C.
LandOfFree
Chip ID applying method suitable for use in semiconductor... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Chip ID applying method suitable for use in semiconductor..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Chip ID applying method suitable for use in semiconductor... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2664388