Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Smart card package
Reexamination Certificate
2000-03-30
2003-08-26
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Smart card package
C257S678000
Reexamination Certificate
active
06611050
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates generally to the manufacture of integrated circuits, and more particularly, to a method of forming a low profile chip-to-chip connection.
2. Related Art
Electronic devices commonly referred to as VLSI, which stands for very large scale integration, require extremely low profile chip connections to ensure the formation of a compact device in some applications. For example, smart cards contain important information, such as the balance of a person's bank account, health information, etc., in a device that is the size of a credit card. Therefore, smart cards require extremely low profile connections to combine the microprocessor, memory, controller, flash memory chip, display, etc., within such a small package. Similarly, low profile connections are required within a CCD (charge coupled device) camera focal plane because the CCD must be positioned as close as possible to the shutter to minimize distortions. Other applications for low profile connections include such devices as other large-field radiation detectors in which numerous chips are combined within a flat array, and mixed substrate systems, such as SOI (silicon-on-insulator) logic and SiGe RF (silicon germanium radio frequency) chips for analog front-end feeding for digital processors.
In these examples, low profile connections are extremely useful for several reasons. Primarily low profile connections are important when overall height of the chip assembly must be minimized. In addition, low profile connections allow subsequent chemical layers of the structure to be more uniformly deposited over the surface of the device, since smaller bumps or non-uniformities are produced.
Currently used techniques, such as wire bonding and surface mounting, occupy too much space for use in a compact device, such as a smart card. Accordingly, there exists a need in the industry for a chip interconnection apparatus that solves the above problems.
SUMMARY OF THE INVENTION
The present invention provides a VLSI chip interconnection apparatus, and a method of forming the same. In particular, the chip interconnection provides a recessed contact area located at the edge of each chip.
The first general aspect of the present invention provides a semiconductor chip connection structure, comprising: a recess within an edge of a first chip and an edge of a second chip, wherein each recess includes a contact area; and a connection between the contact areas of the first and second chips. This aspect provides a low profile chip connection.
The second general aspect of the present invention provides a method of forming a chip-to-chip connection, comprising the steps of: providing a semiconductor wafer, having a dicing channel therein; forming a recess within the wafer at the location of the dicing channel; separating the wafer along the dicing channel to form two chips; and forming a connection within the recess between mating chips. This aspect provides similar advantages as those associated with the first aspect.
The third general aspect of the present invention provides a device including at least two chips connected via an edge connection. This aspect provides a device, such as a smart card, or CCD camera, that utilizes the edge connection structure of the first two embodiments.
The foregoing and other features and advantages of the invention will be apparent from the following more particular description of preferred embodiments of the invention.
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Ference Thomas G.
Howell Wayne J.
Tonti William R.
Williams Richard Q.
Canale Anthony
Flynn Nathan J.
Quinto Kevin
Schmeiser Olsen & Watts
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