Chip carriers with enhanced wire bondability

Stock material or miscellaneous articles – Composite – Of silicon containing

Reexamination Certificate

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C428S421000, C428S422000, C428S461000, C428S901000

Reexamination Certificate

active

06534186

ABSTRACT:

TECHNICAL FIELD
This invention relates generally to a substrate that is selectively non-wettable to adhesive resin and more particularly, the invention relates to a chip carrier with enhanced wire bondability that has been treated with a fluorine-containing compound.
BACKGROUND ART
Plastic chip carriers are typically comprised of an organic substrate, such as a polyimide, having areas of metallic circuitry and wire bond pads. One of the initial stages of the assembly of a chip carrier is typically a board-attach process, during which an organic substrate is attached to a lead frame by means of a thixotropic organic adhesive, such as, for example, an epoxy-based adhesive, an acrylic-based adhesive or a silicone. The adhesive is applied to the lead frame and the substrate is then placed onto the adhesive. The assembly may then be heated to assist in the cure of the adhesive, strengthening the attachment between the substrate and the lead frame. Similar adhesives and processes are used in later stages of device assembly, such as in a die-attach process when integrated circuit chips or devices are bonded to the chip carrier. Depending on the design of the chip carrier, it may not contain a lead frame. By necessity, a chip carrier will always contain a die and most commonly a back-bonded die which is interconnected via wire bonding.
Although the adhesives used during the various stages of device assembly are fairly viscous, they have a propensity to bleed and spread out away from the point of attachment. For example, during the board-attach process, resin from the adhesive often bleeds out .from the periphery of the chip carrier attachment area, and spreads up the edges of the chip carrier onto the circuitized upper surface, where it can contaminate the wire bond pads and render them non-bondable. This condition will cause significant problems during later assembly steps when the bond sites are needed to complete necessary electrical connections. As the resin spreads away from the attachment area, it can contaminate not only the wire bond sites, but also any portions of a soldermask which may lie in the near vicinity.
The problems associated with adhesive resin bleed are even more pronounced when the chip carrier has been treated with a plasma containing oxygen and/or argon, prior to the application of the adhesive. Such plasma treatment is frequently employed to clean the wire bond sites and to roughen up the substrate surface prior to assembly of the semiconductor device.
Resin bleed is also encountered during other stages of semiconductor device assembly. For example, during the die-attach process, an electrically or non-electrically conductive adhesive is used, and it too, can bleed out along the periphery of the die attachment area and spread out over adjacent areas where electrical connections ultimately need to be made.
Various methods for reducing resin bleed have been developed. For example, the chip carrier surface may have a recess at the point of attachment of the die, such that the die and adhesive will be recessed below the adjoining areas of the chip carrier where electrical bonding sites are located. As a drawback to this method, not all integrated circuit assemblies provide the option of a recessed cavity in the carrier surface. Very large scale integrated circuit (VLSI) assemblies, for example, require a large number of bonding sites and these are at the same level as the die attachment surface.
U.S. Pat. No. 5,409,863, issued Apr. 25, 1995, teaches a method for controlling adhesive spread during a die-attach process. This method incorporates a low profile barrier, such as a solder mask ring, into the chip carrier structure. The barrier surrounds the perimeter of the die attachment area, preventing the spread of adhesive resin onto the adjacent bonding sites on the chip carrier.
In light of the many problems associated with adhesive resin bleed, a substrate, such as a chip carrier, that is not subject to this phenomenon, and thus has enhanced wire bondability, is therefore desirable. Furthermore, because of this desirability, a method for rendering a substrate substantially non-wettable to adhesive resin, and therefore not subject to resin bleed, is especially desirable.
SUMMARY OF THE INVENTION
In accordance with the principles of the present invention, a substrate, such as a chip carrier, with enhanced wire bondability is provided. The surfaces of the substrate, which may be both organic and metallic, are coated with a fluorosilane composition. The coating renders the substrate substantially non-wettable, yet well-adhering, to adhesive resin, thus preventing the resin from spreading away from the point of attachment and contaminating other areas of the substrate.
According to one aspect of the present invention, a fluorosilane is combined with an appropriate solvent and the resulting solution is then applied to the surfaces of a substrate by any conventional method and allowed to dry. The application of the fluorosilane composition has been shown to render both organic and the metallic surfaces of a substrate substantially non-wettable to adhesive resin and therefore, free from resin bleed during an attachment process. When used in the context of the present invention, the term “non-wettable” is not to be confused with non-adherent as the disclosed process does not affect the quality of the adhesion between either the die attach or the board attach adhesives and the treated surfaces.
In a preferred embodiment of the invention, the substrate is a chip carrier. In this embodiment, the fluorosilane coating provides the chip carrier with enhanced wire bondability due to the absence of resin bleed and the associated wire bond pad contamination.
DEFINITIONS
The following terms have the indicated meanings within the context of the present invention.
“Alkyl” is intended to include linear, branched or cyclic hydrocarbon structures and combination thereof. “Lower alkyl” refers to alkyl groups of from 1 to 8 carbons. Examples of lower alkyl groups include methyl, ethyl, propyl, isopropyl, butyl, s- and t-butyl, pentyl, hexyl, octyl, cyclopropylethyl, bornyl and the like. Preferred alkyl groups are those of C
30
or below.
“Perfluoroalkyl” refers to alkyl groups wherein each of the H atoms has been substituted by a F atom. Preferred perfluoralkyl groups are of the formula C
n
F
2n+1
, wherein n is an integer from 1 to 30.
“Cycloalkyl” is a subset of alkyl and includes cyclic hydrocarbon groups of from 3 to 8 carbon atoms. Examples of lower cycloalkyl groups include c-propyl, c-butyl, c-pentyl, norbonyl and the like.
“Alkoxy” refers to groups of from 1 to 8 carbon atoms of a straight, branched or cyclic configuration and combinations thereof attached to oxygen. Examples include methoxy, ethoxy, propoxy, isopropoxy, cyclopropyloxy, cyclohexyloxy and the like.
“Halogen” includes F, Cl, Br and I.
It is intended that the definitions of any substituent or symbol (e.g., X) in a particular molecule be independent of its definition elsewhere in the same molecule. Thus, —SiX
3
represents —SiCl
3
, —Si(OCH
3
)
3
, —Si(CH
3
)Cl
2
, —Si(OCH
2
CH
3
)
2
CH
3
, etc.
The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular description of preferred embodiments of the invention.
BEST MODE FOR CARRYING OUT THE INVENTION
In accordance with the principles of the present invention, a substrate is coated with a fluorosilane composition. Such treatment renders both organic and inorganic surfaces of the substrate substantially non-wettable to adhesive resin and provides the surfaces with reduced to negligible resin bleed contamination. In a preferred embodiment, the substrate is a semiconductor chip carrier. In this embodiment, adhesives used during device assembly steps are prevented from bleeding and spreading onto the wire bond sites, thus providing the chip carrier with enhanced wire bondability.
The principles of the present invention can be applied to any organic resinous material used to form the underlying surface of

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