Chip carrier with magnetic shielding

Details Chip carrier with magnetic shielding Chip carrier with magnetic shielding

2002-04-05

2003-05-06

Nelms, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

With shielding

C257S778000, C257S422000

Reexamination Certificate

active

06559521

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method and apparatus for shielding electromagnetic integrated circuits from external magnetic fields.
BACKGROUND OF THE INVENTION
In conventional packaging techniques, an integrated circuit chip or die is first attached to a carrier and then contacts of both the die and the carrier are electrically connected. One such packaged device, called a flip-chip device, requires a semiconductor chip to be flipped and bonded with a carrier, so that contacts of the chip directly bond to contacts of the carrier. Thus, both die bonding and interconnection are simultaneously accomplished.
A conventional bond flip-chip device
10
including an integrated circuit chip or die
30
and a flip-chip carrier
20
is illustrated in FIG.
1
. The flip-chip carrier
20
is fabricated from a substrate
12
, an insulating layer
14
, a plurality of conductive traces
15
(
FIG. 2
) and an elastomeric layer
16
. The conductive traces
15
may be located within or on the insulating layer
14
in a variety of ways, for example, by building up the conductive traces
15
on the insulating layer
14
through electrolytic deposition.
The conductive traces
15
(
FIG. 2
) are each electrically connected to a solder ball
28
through an inset (not shown) in the substrate
12
. Although a single solder ball
28
is shown in
FIG. 1
, it must be understood that any number of solder balls
28
may be employed, as the solder balls
28
are used to mount the flip-chip device
10
to a circuit board or other electrical structure.
The die
30
is shown in dotted line above the flip-chip carrier
20
. In use, the die
30
is positioned on the elastomeric material
16
of the flip-chip carrier
20
. The flip-chip carrier
20
is electrically connected with the die
30
by way of suitable conductive connecting structures, such as, for example, solder balls
24
positioned within a gap
21
of the flip-chip carrier
20
. The solder balls
24
are in electrical connection with respective conductive traces
15
and with suitable contacts on the die
30
.
Recently, very-high density magnetic memories, such as magnetic random access memories (MRAMs), have been proposed to be integrated with CMOS circuits. This integration has also complicated the packaging of such devices, as the packaging must have a longer lifetime, better electrical performance, as well as more efficient heat dissipation.
A typical multilayer-film MRAM includes a plurality of bit or digit lines intersected by a plurality of word lines. At each intersection, layers of ferromagnetic film separated by a non-magnetic film are interposed between the corresponding bit line and word line to form a memory cell. When in use, an MRAM cell stores information as digital bits, the logic value of which depends on the states of magnetization of the thin magnetic multilayer films forming each memory cell. As such, the MRAM cell has two stable magnetic configurations, high resistance representing, for example, a logic state
0
and low resistance representing, for example, a logic state
1
. The magnetization configurations of the MRAMs depend in turn on the magnetization vectors which are oriented as a result of electromagnetic fields applied to the memory cells. The electromagnetic fields used to read and write data are generated by associated CMOS circuitry. However, stray magnetic fields, which are generated external to the MRAM, may cause errors in memory cell operation when they have sufficient magnitude.
Very high-density MRAMs are particularly sensitive to stray magnetic fields mainly because the minuscule MRAM cells require relatively low magnetic fields for read/write operations which, in turn, depend upon the switching or sensing of the magnetic vectors. These magnetic vectors are, in turn, easily affected and have the magnetic orientation changed by such external stray magnetic fields.
To diminish the negative effects of the stray magnetic fields and to avoid sensitivity of MRAM devices to stray magnetic fields, the semiconductor industry could produce memory cells requiring higher switching electromagnetic fields than a stray field which the memory cells would typically encounter. However, the current requirements for operating such memory cells is greatly increased because higher internal fields necessitate more current. Thus, the reliability and scalability of such high current devices decrease accordingly, and the use of MRAMs which may be affected by stray magnetic fields becomes undesirable.
Accordingly, there is a need for an improved magnetic memory packaging structure and a method of forming it, which shield against external magnetic fields and which permit use of lower power levels for circuit operations. There is also a need for a flip-chip packaging device for mounting a magnetic random access memory IC chip which reduces the effects of external magnetic fields on internal memory cell structures and operations. There is further a need for minimizing the cost of a packaging which shields a magnetic random access memory IC chip from external magnetic fields.
SUMMARY OF THE INVENTION
The present invention provides a method for fabricating magnetically shielded electromagnetic integrated circuit structures, such as MRAM structures. The present invention employs one or more magnetic shields which are incorporated either on an integrated circuit chip which contains electromagnetic structures, or in a flip-chip packaging device, or in both. In one exemplary embodiment of the invention, the electromagnetic shield is formed as one or more layers of magnetic field shielding material incorporated on the integrated circuit chip or in a flip-chip carrier, or both. In another exemplary embodiment, a printed circuit board supporting the flip-chip packaging may also include shielding material.
These and other features and advantages of the invention will be more clearly apparent from the following detailed description which is provided in connection with accompanying drawings and which illustrates exemplary embodiments of the invention.


REFERENCES:
patent: 4656499 (1987-04-01), Butt
patent: 5288238 (1994-02-01), Ikenaka et al.
patent: 5352925 (1994-10-01), Sudoh et al.
patent: 5371404 (1994-12-01), Juskey et al.
patent: 5490786 (1996-02-01), Mosquera et al.
patent: 5939772 (1999-08-01), Hurst et al.

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