Chip-carrier substrates

Details Chip-carrier substrates Chip-carrier substrates

1984-02-10

1985-04-02

Pellinen, A. D.

Electricity: electrical systems and devices

Electrostatic capacitors

Fixed capacitor

174 16HS, 357 80, 357 81, 361387, 361403, H05K 720

Patent

active

045090963

ABSTRACT:
A substrate for a leadless chip carrier is formed on a rigid multi-layer circuit board. Layers of copper-clad invar are secured to opposite sides of the board, and on top of these are mounted respective layers of elastomeric material. An electrically-conductive layer is laid on top of the upper elastomeric layer and this is formed in a pattern of contact elements, and tracks which may be of dog-leg shape and which are interconnected to other layers of the substrate by plated holes. The chip carrier is supported on a heat transfer pad of copper which rests on the upper invar layer and is secured thereto by a layer of solder. The pad may have an integral pillar that extends through a copper-plated aperture in the substrate to a heat-dissipating pad on the surface of the lower elastomeric layer. Contact pads on the chip carrier are soldered to the contact elements, the height of the heat-transfer pad being such as to separate them and ensure a thick solder joint. The solder joints and the solder under the heat-transfer pad apply a force urging the carrier into close contact with the pad. Heat is conducted away from the underside of the carrier by the pad to the top invar layer, or, where the pad has a pillar, also to the lower invar layer and the heat-dissipating pad.

REFERENCES:
patent: 3777220 (1973-12-01), Tatusko et al.
patent: 3969754 (1976-07-01), Kuniya et al.
patent: 4189524 (1980-02-01), Lazzari
patent: 4413308 (1983-11-01), Brown
patent: 4420767 (1983-12-01), Hodge et al.
Tiffany "IBM Technical Disclosure Bulletin", vol. 13, No. 1, Jun. 1970, p. 58.

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