Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Reexamination Certificate
2000-08-09
2002-08-27
Martin, David (Department: 2841)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
C361S719000, C361S720000, C361S764000, C257S707000, C257S706000, C257S712000, C174S252000
Reexamination Certificate
active
06442043
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Applications No. 11-227937, filed Aug. 11, 1999; and No. 11-227938, filed Aug. 11, 1999, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
Conventionally, when LEI parts are assembled on a flexible printed circuit (FPC) substrate, a COB (chip on board) method has been mainly used, wherein an IC bear chip
10
is located on a FPC substrate
20
with an electrode
11
thereof upward, the chip electrode
11
and a FPC substrate electrode
21
are wire-bonded with each other by means of an Au wire
30
, and subsequently the whole body is sealed by means of a resin
31
, as shown in the cross-sectional view of FIG.
6
.
On the other hand, recently a bump connection method such as BGA (ball grid array), CSP (chip sized package), flip chip and the like having an electrode on the lower side thereof has been increasingly employed.
FIG. 7
is a cross-sectional view showing an example thereof. The bear chip
10
is located on the lower surface with the electrode
11
downward, and is connected with the electrode
21
of the FPC substrate
20
with a bump
32
such as a ball or the like therebetween.
In a flip chip assembly method, since the substrate electrodes
21
must be opposed to each other in the same pitch as the IC electrode
11
, it is indispensable to form a fine pattern. However, when a double-sided (two-layer) type substrate is used as the FPC substrate
20
, and a chip is assembled on a front surface (upper layer) circuit pattern, an uneven rear surface (lower layer) circuit pattern influences also the front surface circuit. Therefore, it is usual to make the rear surface circuit portion on the chip assembly part a solid pattern land by means of the widest Cu circuit possible. However, it is difficult in design to bypass such an extremely wide solid pattern circuit portion and to draw out a fine pattern.
Moreover, in order to prevent short circuit between the electrodes, a solder resist is used around the connection portion between the chip and the circuit pattern in the chip assembly part, and due to a fine pattern this raises difficult problems in the production process including the selection of a resist material and the discussion of an applying method.
Moreover, in the flip chip assembly, the rear surface of the IC chip
10
looks upward and is exposed in the highly heat-insulating air, what is disadvantageous with respect to the radiating characteristics. Therefore, conventionally a radiating part such as a radiating fin or the like is bonded on the rear surface of the IC chip
10
by means of a heat-conductive adhesive in order to improve the radiation property. However, the method of bonding a radiating part on the chip causes the deformation or destruction of the assembly part due to a mechanical stress applied to the chip itself and to the assembly part on the lower surface thereof by the gravity of the radiating part.
In a COB method shown in
FIG. 6
, wire bonding is possible at any position where a wire loop of the Au wire
30
can be formed. So, the signal line from the LSI pad and the power source and ground lines can be connected separately to the substrate side so that the electric characteristics of the assembly module may become advantageous.
FIG. 8
is a cross-sectional view showing an example thereof. There are two kinds of substrates used in this chip assembly module, and the one is a single-sided FPC substrate
20
applied to the output side drawing out a signal line in a fine pitch. The other is a double-sided RPC substrate
40
applied to the input side requiring a power source line and a ground line to be drawn in a thick pattern. The single-sided FPC substrate
20
is fabricated by integrating upper and lower two-layer insulating films
23
and
24
with a conductive circuit pattern
22
therebetween. RPC double-sided substrate
40
is fabricated by forming upper and lower two-layer conductive patterns
41
and
42
in an insulating board
43
. These substrates
20
and
40
are bonded at a bonding part
33
.
In a bump connection method shown in
FIG. 7
, the substrate electrodes must be also opposed to each other in the same order as in bump array (LSI pad array), and an equal pitch pattern must be formed on the substrate. However, there are difficulties in realizing this. Particularly, in the flip chip assembly, it is difficult to form a fine pattern and to isolate a signal line, a power source line and a ground line from each other. In a COB assembly structure shown in
FIG. 8
, there are no such problems, however, this structure can not be applied to the bump connection method requiring a flat chip assembly pat. Moreover, by using the RPC double-sided substrate
40
, there is an increase in cost.
BRIEF SUMMARY OF THE INVENTION
Therefore, one object of the present invention is to provide a chip assembly module of bump connection type being capable of being made thin as a whole and also being capable of radiating heat efficiently from the assembled chip.
Another object of the present invention is to provide a chip assembly module of bump connection type having superior electric characteristics and being capable of performing a high density assembly by using only a FPC double-sided substrate.
According to the present invention, a chip assembly module is provided, comprising:
a multi-layer structured printed circuit substrate having at least an upper conductive layer and a lower conductive layer with an inter-layer insulating layer and having a chip assembly part formed thereon;
a chip having a bump part formed therein which is assembled in the chip assembly part of the printed circuit substrate by means of bump connection method; and
a flat plate type radiating plate located on the printed circuit substrate, wherein
the chip assembly part is formed by forming a chip opening corresponding to the chip on the upper conductive layer, forming a bump opening corresponding to the bump part of the chip on the inter-layer insulating layer exposed from this chip opening, and exposing the lower conductive layer from this opening, and the chip is buried in the chip opening of the chip assembly part and assembled so that the upper surface thereof may protrude from the upper conductive layer;
the radiating plate has substantially the same opening as the chip opening of the chip assembly part, and it also has such a thickness as the upper surface thereof is only a little higher than the upper surface of the chip assembled in the chip assembly part; and
a heat conductive adhesive is filled between the inner wall of the opening of the radiating plate and the side of the chip.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.
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Abstract
Kaizu Masahiro
Seki Yoshihito
Bui Hung
Fujikura Limited
Martin David
Sughrue & Mion, PLLC
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