Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Reexamination Certificate
1999-03-29
2002-10-01
Chaudhuri, Olik (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Heterojunction
Reexamination Certificate
active
06459095
ABSTRACT:
TECHNICAL FIELD
The present invention relates generally to electronic devices whose functional length scales are measured in nanometers, and, more particularly, to simple devices used as building blocks to form more complicated structures, and to the methods for forming such devices. Devices both of micrometer and nanometer scale may be constructed in accordance with the teachings herein.
BACKGROUND ART
The silicon (Si) integrated circuit (IC) has dominated electronics and has helped it grow to become one of the world's largest and most critical industries over the past thirty-five years. However, because of a combination of physical and economic reasons, the miniaturization that has accompanied the growth of Si ICs is reaching its limit. The present scale of devices is on the order of tenths of micrometers. New solutions are being proposed to take electronics to ever smaller levels; such current solutions are directed to constructing nanometer-scale devices.
Prior proposed solutions to the problem of constructing nanometer-scale devices have involved (1) the utilization of extremely fine scale lithography using X-rays, electrons, ions, scanning probes, or stamping to define the device components; (2) direct writing of the device components by electrons, ions, or scanning probes; or (3) the direct chemical synthesis and linking of components with covalent bonds. The major problem with (1) is that the wafer on which the devices are built must be aligned to within a small fraction of the size of the device features in at least two dimensions for several successive stages of lithography, followed by etching or deposition to build the devices. This level of control does not scale well as device sizes are reduced to nanometer scale dimensions. It becomes extremely expensive to implement as devices are scaled down to nanometer scale dimensions. The major problem with (2) is that it is a serial process, and direct writing a wafer full of complex devices, each containing trillions of components, could well require many years. Finally, the problem with (3) is that high information content molecules are typically macromolecular structures such as proteins or DNA, and both have extremely complex and, to date, unpredictable secondary and tertiary structures that cause them to twist into helices, fold into sheets, and form other complex 3D structures that will have a significant and usually deleterious effect on their desired electrical properties as well as make interfacing them to the outside world impossible.
There remains a need for a basic approach to form nanometer-scale devices that can be used to form more complex circuits and systems, and that scale readily and cheaply down to nanometer-scale dimensions.
DISCLOSURE OF INVENTION
In accordance with the present invention, a route to the fabrication of electronic devices is provided, in which the devices consist of two crossed wires sandwiching an electrically addressable molecular species. The approach is extremely simple and inexpensive to implement, and scales from wire dimensions of several micrometers down to nanometer-scale dimensions. The device of the present invention can be used to produce crossbar switch arrays, logic devices, memory devices, and communication and signal routing devices.
The present invention enables construction of molecular electronic devices on a length scale than can range from micrometers to nanometers via a straightforward and inexpensive chemical assembly procedure. The device is either partially or completely chemically assembled, and the key to the scaling is that the location of the devices on the substrate are defined once the devices have been assembled, not prior to assembly.
The electronic device of the present invention, in one realization, is a quantum-state molecular switch comprising an electrically adjustable tunnel junction between two wires. Only at the intersection of the two wires is an actual device defined. The exact position of this intersection is not important for this architecture. The molecular devices sandwiched between the wires can be electrochemically oxidized or reduced. Oxidation or reduction of the molecule forms the basis of a switch. Oxidation or reduction will affect the tunneling distance or the tunneling barrier height between the two wires, thereby exponentially altering the rate of charge transport across the wire junction. Some types of molecules can be cycled reversibly, while others will act irreversibly. The chemical state of the molecular switches determines the tunneling resistance between the two wires.
The present invention solves several problems that currently plague current solid state electronic device technology. First, the fundamental device unit is a molecule or a layer of molecules at the junction of two wires, and so the devices will scale down from wires of micrometer length scales to wires of molecular length scales (a nanometer, for example) without appreciable change in device operation. Second, molecular devices are voltage, not electric field, addressable. This means that molecular switches can be set at one voltage, and the state of the switch can be read at another voltage (either smaller in magnitude or a different polarity), and only two wires are required for the entire process. In most solid-state devices, a total of four wires are required to set and subsequently read the state of a switch. These include two wires that are required to set the state of a switch, and two different wires that are required to read the state of that switch. Third, the devices that are fabricated are extremely versatile, and can be configured to carry out any number of tasks, ranging from memory to logic to communication and signal routing to energy storage. Finally, since only two wires are needed to address and read these devices, and since the device itself is defined not by high resolution lithographic templating, but rather by the relatively arbitrary intersection of two wires, the fabrication process for these wires is substantially simpler and more tolerant of manufacturing deficiencies than is the current art.
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Heath James R.
Kuekes Philip J.
Williams R. Stanley
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