Chemical-mechanical polishing method

Details Chemical-mechanical polishing method Chemical-mechanical polishing method

1998-08-11

2000-06-20

Utech, Benjamin L.

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

438692, 438694, H01L 21302

Patent

active

060777842

ABSTRACT:
A chemical-mechanical polishing process for forming a metallic interconnect includes the steps of providing a semiconductor substrate having a first metallic line thereon, and then forming a dielectric layer over the substrate and the first metallic line. Next, a chemical-mechanical polishing method is used to polish the surface of the dielectric layer. Thereafter, a thin cap layer is formed over the polished dielectric layer. The thin cap layer having a thickness of between 1000-3000 .ANG. can be, for example, a silicon dioxide layer, a phosphosilicate glass layer or a silicon-rich oxide layer. The method of forming the cap layer includes depositing silicon oxide using a chemical vapor deposition method with silicane (SiH.sub.4) or tetra-ethyl-ortho-silicate (TEOS) as the main reactive agent. Alternatively, the cap layer can be formed by depositing silicon nitride using a chemical vapor deposition method with silicane or silicon dichlorohydride (SiH.sub.2 Cl.sub.2) as the main reactive agent. Finally, a via opening is formed through the dielectric layer and the cap layer, and a second metallic line that couples electrically with the first metallic line through the via opening is formed.

REFERENCES:
patent: 5798283 (1998-08-01), Montague et al.
patent: 5798299 (1998-08-01), Chung
patent: 5942801 (1999-08-01), Tran
patent: 5960295 (1999-09-01), Jen et al.
patent: 5963788 (1999-10-01), Barron et al.

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