Checking design for testability rules with a VHDL simulator

Details Checking design for testability rules with a VHDL simulator Checking design for testability rules with a VHDL simulator

1993-10-07

1996-03-26

Ramirez, Ellis B.

Boots, shoes, and leggings

371 221, G06F 1100

Patent

active

055026613

ABSTRACT:
Application of VHDL simulators to check the conformance of a design with Design for Testability (DFT) rules. A special DFT logic using VHDL's powerful logic modeling capabilities is defined and a kind of symbolic simulation based on this DFT logic is performed.

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