Charging a capacitance of a memory cell and charger

Details Charging a capacitance of a memory cell and charger Charging a capacitance of a memory cell and charger

2001-06-22

2003-01-07

Mai, Son (Department: 2818)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185240, C365S185280, C365S185290

Reexamination Certificate

active

06504760

ABSTRACT:

FIELD OF INVENTION
The present invention is in the field of charging a capacitance of a memory cell. More particularly, embodiments of the present invention can set a threshold voltage of a memory cell to represent data.
BACKGROUND
One factor of the size, speed, and power consumption of memory can be the programming algorithm. A programming algorithm is an algorithm that can store a charge on a floating gate of a transistor, changing the threshold voltage of the transistor. Multi-level-cell (MLC) programming algorithms may program the transistor from an erase state, a minimum charge range, to more than one program states. Each program state may be a range of charge on the floating gate and can be separated by an error range to allow a read circuit to distinguish program states. Further, the width of each program state can depend on the accuracy of the programming algorithm and the width of each error range can depend on the accuracy of the reading circuitry when considering the effects of noise.
Programming algorithms may apply programming pulses to a transistor in saturation mode to reduce the chance of overshooting a target state. Applying programming pulses to the transistor can increase the charge on the floating gate to a target threshold voltage, a charge level within the target state. When the programming pulses are applied so the transistor remains in saturation mode, the charge increases logarithmically to program the transistor slowly. The chance of overshooting the target state can be reduced by programming in saturation mode at the cost of applying extra pulses. However, overshooting a target state can slow down the speed of the memory even more since the overshoot can require a row of transistors to be erased and reprogrammed.
Programming algorithms program a transistor, for example, by applying one-microsecond programming pulses using a gate voltage that is increased by 250 millivolts for each pulse until the transistor verifies as having a charge within the target state. However, algorithms may be data dependent because program states that require a greater charge can also require more programming pulses. Each extra programming pulse requires more time and energy. Thus, the amount of time and energy expended to store data depends on the data to be stored.


REFERENCES:
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patent: 5163021 (1992-11-01), Mehrotra et al.
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patent: 5671388 (1997-09-01), Hasbun
patent: 5949714 (1999-09-01), Hemink et al.
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patent: 6259627 (2001-07-01), Wong
INTEL®, AP-325 Application Note, Guide to First Generation Flash Memory Reprogramming, Mar. 1994, pp. 23.

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