Radiant energy – Irradiation of objects or material – Irradiation of semiconductor devices
Reexamination Certificate
2000-03-27
2003-03-04
Lee, John R. (Department: 2881)
Radiant energy
Irradiation of objects or material
Irradiation of semiconductor devices
C250S492100, C250S492300, C250S3960ML
Reexamination Certificate
active
06528806
ABSTRACT:
FIELD OF THE INVENTION
This invention pertains to microlithography (projection-transfer of a pattern, defined on a reticle or mask, to a substrate that is “sensitive” to the energy beam, used for the pattern transfer, in an image-forming way). Microlithography is a key technology used in the manufacture of semiconductor integrated circuits and displays. More specifically, the invention pertains to microlithography performed using a charged particle beam such as an electron beam, with correction of certain proximity effects.
BACKGROUND OF THE INVENTION
Most conventional microlithography utilizes light (especially ultraviolet light) as the energy beam for performing pattern transfer. Light-based microlithography is termed “optical” microlithography. However, as the complexity and miniaturization of electronic devices (e.g., microprocessors, memories, and displays) has continued to increase, the resolution limitations (arising from, e.g., diffraction phenomena) of optical microlithography is more and more problematic. Hence, considerable development effort is being expended to develop a practical microlithography technology that can achieve better resolution of pattern elements, especially at line-widths of 0.1 &mgr;m (100 nm) or less. To such end, utilization of other types of energy beams is being investigated for microlithography, including various charged particle beams such as an electron beam subjected to an acceleration voltage of several tens of KV to about 100 KV.
A charged-particle-beam (CPB) microlithography apparatus employs a charged particle beam (e.g., electron beam or ion beam) as an energy beam by which a pattern defined on a reticle is projection transferred to a suitable substrate (“wafer”). Certain aspects of a conventional CPB microlithography apparatus
80
are depicted schematically in FIG.
1
. The
FIG. 1
apparatus
80
employs a conventional reticle
90
that defines the pattern, and comprises an illumination unit
81
, a reticle stage
82
, a projection unit
83
, a wafer stage
84
, and a control unit
85
.
The illumination unit
81
produces and directs a charged particle beam (e.g., electron beam) from a source toward the reticle stage
82
. The reticle
90
is mounted to the reticle stage
82
such that the charged particle beam from the illumination unit
81
illuminates the reticle
90
. The beam between the source and the reticle
90
is termed the “illumination beam” IB.
The reticle
90
“patterns” the charged particle beam in an image-forming way. Certain aspects of a conventional CPB reticle
90
are depicted schematically in
FIG. 2
, including an alignment pattern
91
and multiple nearby circuit elements
92
of a “chip” pattern. The illumination beam IB from the illumination unit
81
passing through the depicted region of the reticle
90
illuminates the alignment pattern
91
and the circuit elements
92
. As the illumination beam IB passes through the depicted portion of the reticle
90
, the beam is patterned according to the illuminated alignment pattern
91
and circuit elements
92
. In this context, “patterned” means that the beam propagating downstream of the reticle
90
acquires an ability to form an image of the illuminated portion of the reticle.
The patterned beam PB propagates from the reticle
90
to the projection unit
83
. The projection unit
83
is configured to deflect the patterned beam PB laterally as the beam propagates toward the wafer stage
84
. The magnitude and direction of deflection is according to a command C input to the projection unit
83
from the control unit
85
. The command C is an electrical signal encoding the desired position on the wafer
86
to which the patterned beam PB is to be deflected so as to expose the wafer
86
.
The wafer
86
can be any suitable substrate but is usually a semiconductor wafer (e.g., silicon wafer), and hence the general term “wafer” is used herein. The upstream-facing surface of the wafer
86
is coated with a “resist” that is sensitive to exposure by the patterned beam. Thus, as the patterned beam PB impinges on the resist, the resist is imprinted with a latent image of the illuminated portion of the reticle
90
. For exposure, the wafer
86
is mounted to the wafer stage
84
. Typically, the wafer
86
is sufficiently large to accommodate multiple chips being formed on it, wherein each “chip” is destined to become a separate semiconductor device.
The control unit
85
is a device (e.g., microprocessor or analogous controller circuit) configured to control operation of the illumination unit
81
and the projection unit
83
. For example, the control unit
85
controls the turning ON and OFF of emission of the charged particle beam by the illumination unit
81
.
Thus, an image of the circuit elements
92
and an image of the alignment pattern
91
are “transferred” to the sensitized surface of the wafer
86
. The image of the alignment pattern
91
is termed an “alignment mark.”
In addition to control of minimum line-width, other crucial aspects of microlithography as applied to the manufacture of semiconductor devices are throughput and registration accuracy between the various layers of each chip that must interconnect accurately with each other in the chip. “Throughput” is the number of wafers that can be processed microlithographically per unit time.
In conventional mass-production of semiconductor devices in which optical microlithography is used, alignment marks are employed that are detected by an optical-based alignment-detection method such as LSA or FIA. Certain alignment marks are situated in spaces between chips as formed on the wafer, and are used for various purposes including ensuring accurate exposure position of each chip and accurate registration of the various layers in each chip with each other. Such alignment marks are also important in CPB microlithography.
CPB microlithography is subject to a phenomenon termed “proximity effects” as known in the art. With respect to elements as projected onto the wafer, proximity effects are manifest as, e.g., mis-shaped elements and reduced resolution of pattern elements situated proximally to each other. Proximity effects are caused largely by scattering of incident electrons within the resist and/or other materials on the wafer. Scattered electrons can have undesirable effects such as at least partial “exposure” of the resist in regions traversed by the scattered electrons, thereby degrading pattern-transfer accuracy and resolution. Therefore, correction of proximity effects is an important aspect of achieving practical CPB microlithography.
In CPB microlithography, the degree and extent of electron scattering from a point of incidence on the wafer is a function of the beam-acceleration voltage. I.e., as the acceleration voltage is increased, the depth and horizontal distance in the resist traversed by scattered electrons correspondingly increases. This phenomenon is depicted in FIGS.
3
(
a
)-(
b
) in which the respective electron-scatter trace diagrams were created by a Monte Carlo simulator, and the hypothetical resist thickness was 0.5 &mgr;m on a silicon substrate. FIG.
3
(
a
) is an electronscatter trace at a beam-acceleration voltage of 30 KV, and FIG.
3
(
b
) is an electron-scatter trace at a beam-acceleration voltage of 100 KV. The abscissa (horizontal axis) is distance of lateral propagation from the point of incidence, and the ordinate (vertical axis) is depth from the point of incidence on the resist surface. As shown in FIG.
3
(
a
), the lateral (horizontal) extent of electron scatter from the point of incidence is approximately 7 &mgr;m with an electron beam subjected to an acceleration voltage of 30 KV. The lateral scatter is 15 &mgr;m to 20 &mgr;m at an acceleration voltage of 50 KV (not shown), 35 &mgr;m to 40 &mgr;m at an acceleration voltage of 75 KV (not shown), and in excess of 65 &mgr;m at an acceleration voltage of 100 KV (FIG.
3
(
b
)).
Hence, in CPB microlithography, whenever a wafer is exposed using an electron beam having an acceleration voltage on the order of several tens of
Klarquist & Sparkman, LLP
Lee John R.
Nikon Corporation
Vanore David A.
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