Charged device mode ESD protection circuit

Details Charged device mode ESD protection circuit Charged device mode ESD protection circuit

1997-02-24

1999-05-04

Leja, Ronald W.

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

361111, H02H 900

Patent

active

059010223

ABSTRACT:
An ESD protection circuit for deep-submicron CMOS IC's provides Charged-Device Model (CDM) protection in addition to Human-Body Model (HBM) and Machine Model (MM) ESD events. An on-chip inductor is connected in series between a conventional ESD protection circuit and the thin gate oxide of a charged-device IC input stage. The inductor provides a voltage drop effect, a current limitation effect, and a time delay effect to prevent the CDM ESD current from being discharged through the thin gate oxide of the input stage IC. The inductor cooperates with traditional input ESD protection circuits to enable full ESD protection against all HBM, MM, and CDM ESD events. The inductor can be implemented in a square spiral layout structure of metal and/or poly, and can be placed directly under the input bonding pad, so as not to increase the total layout area of the input pad and input ESD protection circuits.

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