Charge transfer memory and fabrication method thereof

Details Charge transfer memory and fabrication method thereof Charge transfer memory and fabrication method thereof

1989-01-17

1989-10-31

Munson, Gene M.

Electrical pulse counters, pulse dividers, or shift registers: c

Counting or dividing in incremental steps

Beam type tube

377 61, H01L 2978, G11C 1928

Patent

active

048781037

ABSTRACT:
A charge transfer memory and its fabrication method are disclosed. The memory has charge transfer shift registers, with four phases and two level of electrodes, and a reading register with two phases and three levels of electrodes. At one end of each shift register, there is a final electrode contiguous with a reading storage electrode of the reading register, which is itself contiguous to a reading transfer electrode. These electrodes are made in a layer, with a second type of doping, of a semiconductor substrate with a first type of doping. Zones with a third type of doping are made facing the transfer electrodes of the reading register. According to the invention, facing the final electrode of each shift register, a zone with a fourth type of doping is made. This zone with a fourth type of doping prevents charges flowing in the reading register from returning to a shift register.

REFERENCES:
patent: 3852799 (1974-12-01), Walden
patent: 4159430 (1979-06-01), Boudewijns et al.
patent: 4262217 (1981-04-01), Levine
patent: 4621369 (1986-11-01), Narabu et al.
patent: 4625322 (1986-11-01), Tukazaki et al.
patent: 4654865 (1987-03-01), Sunazuka et al.
patent: 4740908 (1988-04-01), Berger et al.
patent: 4777519 (1988-10-01), Oshima
Patent Abstracts of Japan, vol. 9, No. 285, (P-404) [2008], Nov. 12, 1985.

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