Charge transfer device input circuitry

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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333165, 343 171R, 357 24, H03K 2100, H03K 2308, H03K 2500

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active

042232333

ABSTRACT:
A charge transfer device having a source diffusion region, an isolation gate region, a reference voltage gate region and an input signal gate region disposed contiguously along such device, the isolation gate region being adapted for coupling to a pulse voltage source, the duration of such pulse being related to a predetermined sampling interval (and therefore related to the bandwidth of an input signal being sampled), the reference voltage gate region being adapted for coupling to a reference voltage source and the input signal gate region being adapted for coupling to the input signal. During each clock interval prior to the sampling interval the source diffusion region is pulsed, thereby enabling charge to pass from such region into the reference voltage gate region and the input gate region. During the sampling interval the potential energy level of the isolation gate region is lowered to enable equilibration of the potential of the charge in the input gate region with the potential in the reference voltage source region, the charge in such input gate region thereby being proportional to the input signal level during the sampling interval. At the end of the sampling interval the potential energy level of the isolation gate region is raised to isolate the source diffusion region from the input gate region and thereby inhibit charge flow from the input gate region to the source diffusion region if the input signal level varies prior to the time at which the charge in the input gate region is transferred to the first storage stage of the device.

REFERENCES:
patent: 3942034 (1976-03-01), Buss
patent: 3950750 (1976-04-01), C hurchill et al.
patent: 4016567 (1977-04-01), Buss
patent: 4032867 (1977-06-01), Engeler et al.
patent: 4035629 (1977-07-01), Lampe et al.
C. H. Sequin et al., "Charge Transfer Devices," Bell Telephone Laboratories, 1975.
R. D. Baertsch et al., IEEE Journal, Solid-State Circuits, Feb. 1976, vol. SC-11, No. 1, pp. 64-74.
J. B. G. Roberts et al., IEEE Journal, Solid-State Circuits, Feb. 1976, vol. SC-11, No. 1, pp. 100-104.

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