Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Charge transfer device
Reexamination Certificate
2000-01-20
2001-03-27
Ngô ;, Ngâ ;n V. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Charge transfer device
C257S238000, C257S315000, C257S316000
Reexamination Certificate
active
06207983
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a charge transfer device, and a driving method and a manufacturing method for the charge transfer device and particularly, to a floating gate type-charge detector applied to the output portion of a charge transfer device and a driving method and a manufacturing method for the charge transfer device.
2. Description of the Prior Art
A floating diffusion type-charge detector and a floating gate type-charge detector are generally known as a charge detector which is applied to the output portion of a charge transfer device.
In the case of the floating diffusion type-charge detector, signal charge to be detected is accumulated in a floating diffusion layer provided at the output portion of the detector, and the potential variation of the floating diffusion layer due to the accumulation of the signal charge is amplified by a buffer amplifier which is generally provided in a chip, and then output to the outside.
In the case of the floating gate type-charge detector, the signal charge to be detected is accumulated in a transfer channel below a floating gate provided at the output portion of the detector, and the potential variation which is induced in the floating gate through the coupling capacitance between the transfer channel and floating gate is amplified by a buffer amplifier, and then output to the outside.
In the floating diffusion type-charge detector, the conversion efficiency for conversion of the signal charge to the output voltage can be set to a higher value as compared with the floating gate type-charge detector by reducing the capacitance of the floating diffusion layer. However, it carries out a so-called destructive detection in which signal charge cannot be reproduced once it detects the signal charge, and it has a disadvantage that there occurs a noise which is so-called reset noise.
On the other hand, as compared with the floating diffusion type-charge detector, the floating gate type-charge detector has generally lower conversion efficiency for conversion of the signal charge to the output voltage, however, the signal charge can be non-destructively detected, and at this time occurrence of the reset noise can be prevented.
The floating gate type-charge detector is divided into two types. In one type of floating gate type-charge detector, when a charge transfer element to which this floating gate type-charge device is applied is driven, a bias gate is provided above the floating gate to control the operating point of the floating gate. In the other type of floating gate type-charge detector, a preset transistor for resetting the potential of the floating gate to a reference potential before the charge detection is provided.
FIG. 1
is a schematic diagram showing a conventional floating gate type-charge detector as disclosed in Japanese Laid-open Patent Publication No. 57-27497, and a bias gate is provided above a floating gate. A charge detector shown in
FIG. 1
includes terminals
301
and
302
for supplying a driving voltage, transfer electrodes
306
,
307
,
309
and
310
for a charge transfer element, floating gate
308
, output amplifier
304
, wire
303
connecting the floating gate
308
and the output amplifier
304
to each other, DC bias gate
315
, terminal
314
for applying a DC voltage to the DC bias gate
315
, amplifier output terminal
305
of the output amplifier
304
, insulating film
311
and semiconductor substrate
312
. The transfer electrodes
306
and
309
are connected to the terminal
301
, and the transfer electrodes
307
and
310
are connected to the terminal
302
.
The charge detector shown in
FIG. 1
is operated in a (2+½)-phase driving mode by driving pulses &PHgr;A and &PHgr;B shown FIG.
2
. The three electrodes
306
,
307
and
308
constitute one row of the charge transfer element. The terminals
301
and
302
are supplied with the pulses &PHgr;A and &PHgr;B which are shifted in phase by 120°, and a suitable DC voltage VC is applied through the terminal
314
to the bias gate
315
so that the offset level of the floating gate
308
is adjusted and set to about a half of the pulse voltage of the pulses &PHgr;A and &PHgr;B.
The transfer of the signal charge is carried out as follows. That is, when signal charge
313
is transferred and located below the floating gate
308
, the voltage which is substantially proportional to the amount of the signal charge
313
is induced at the floating gate
308
through the coupling capacitance between a transfer channel and the floating gate
308
, and the voltage thus induced is output as an output voltage through the output amplifier
305
to the outside. At this time, the signal charge
313
is kept below the floating gate
308
without being extinguished, and also it is allowed to be transferred to the adjacent electrode. Therefore, this charge detection method is a so-called non-destructive detection method.
The floating gate type-charge detector is also disclosed in Japanese Laid-open patent Publication No. 5-152558.
With respect to such a floating gate type-charge detector that a bias gate is provided above a floating gate, there is know such a structure that a bias feedback circuit is installed in order to reduce parasitic capacitance of the floating gate and enhance the conversion efficiency for conversion of the signal charge to the output voltage.
FIG. 3
shows a conventional floating gate type-charge detector disclosed in Japanese Laid-open Patent Publication No. 11-040798, and a bias gate and a bias feedback circuit are provided. In the charge detector shown in
FIG. 3
, N-type buried channel
417
is formed in P-type well
416
on N-type semiconductor substrate
412
. Insulating film
411
is formed on the N-type buried channel
417
, and transfer electrodes
406
B,
406
S,
407
B,
407
S,
409
B,
409
S,
410
B and
410
S for the charge transfer element is formed on the insulating film
411
. Further, N
−
region
418
for forming a potential barrier is provided in the N-type channel
417
below the specific transfer electrodes
406
B,
407
B,
409
B and
410
B, thereby implementing a two-phase driving operation. Output gate
419
and floating gate
408
are provided between the transfer gates
407
and
409
, and bias gate
415
is provided on insulating film
411
formed on the floating gate
408
. The potential variation of the floating gate
408
is passed through buffer amplifier
404
and then output from output terminal
405
to the outside. Further, bias feedback circuit
420
comprising capacitance element
422
and resistance element
423
which are series-connected to each other is provided, and the connection point between the capacitance element
422
and the resistance element
423
is further connected to the bias gate
415
.
In the case of the floating gate type-charge detector in which the bias gate is provided above the floating gate as described above, in other words, in the case of the floating gate type-charge detector in which no preset transistor is provided, the electrical operating point of the floating gate is varied in proportion to the charge amount when the floating gate is charged by some cause during the manufacturing process of a charge transfer device to which the above charge detector is applied or at the stage that it is used after the manufacturing.
The bias gate or both of the bias gate and the bias feedback circuit are originally provided to control the operating point of the floating gate. However, when the charge amount is excessively increased, the operating point of the floating gate cannot be sufficiently controlled by only the effect of the capacitance coupling between the bias gate and the floating gate, and consequently the signal charge cannot be detected or the conversion efficiency of converting the signal charge to the output voltage is extremely lowered. Even when the charge amount is not excessively large, it is required to correct the voltage to be applied to the bias gate every individual charge detector if the
Mutoh Nobuhiko
Nakano Takashi
Hutchins, Wheeler & Dittmar
NEC Corporation
Ngô ; Ngâ ;n V.
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