Electrical pulse counters – pulse dividers – or shift registers: c – Charge transfer device – Particular input or output means
Reexamination Certificate
1996-10-30
2003-01-21
Munson, Gene M. (Department: 2811)
Electrical pulse counters, pulse dividers, or shift registers: c
Charge transfer device
Particular input or output means
C257S236000, C257S239000, C257S241000
Reexamination Certificate
active
06510193
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a semiconductor device for performing parallel signal processing, and more particularly, to a semiconductor device for performing calculation processing of multiple input signals by controlling the flow of electric charges from a charge supply unit, and to a semiconductor circuit using such a device.
2. Description of the Related Art
In conventional semiconductor devices for performing parallel calculation processing, as the number of signals to be subjected to parallel calculation increases, the scale of circuitry increases in geometrical progression, so that the production cost increases and the production yield decreases. In accordance with an increase in the scale of circuitry, the calculation speed decreases due to an increase in delay in interconnection and the like, and an increase in the number of calculation operations within the circuitry. In addition, electric power consumption greatly increases.
For example, in the case of a solid-state image pickup device shown in
FIG. 1
, image pickup elements
41
are arranged along the vertical and horizontal axes. A time-serial analog signal from a sensing unit
60
, serving as an area sensor, is converted into a digital signal by an A/D (analog-to-digital) converter
40
, and the obtained digital signal is temporarily stored in a frame memory
39
. The signal is then processed by a calculation circuit
38
, and the resultant signal is output from a calculation-result output circuit
50
. More specifically, for example, the amount of movement (&Dgr;x, &Dgr;y) of an object can be output by calculating correlation between data at different times.
However, when intending to perform real-time processing of a moving image, since the number of the above-described calculation processes is extremely large, the scale of circuitry increases in geometrical progression in order to obtain a more real image, thereby reducing the processing speed. For example, apparatuses which can actually deal with the MPEG 2 (Moving Picture Experts Group Phase 2) method proposed as a method for compressing/expanding a moving image are still in a stage of development. Accordingly, the above-described parallel calculation processing has the problems that the calculation speed decreases and electric power consumption increases due to an increase in the scale of circuitry, thereby causing an increase in the production cost and a decrease in the production yield.
A majority calculation circuit which is useful for the above-described calculation processing is described in “An Economic Majority Logic Circuit Has Been Realized Using a CMOS Structure”, Nikkei Electronics, Nov. 5, 1973, pp. 132-144 (in Japanese). In this article, a majority logic circuit formed using a CMOS (complementary metal oxide semiconductor) structure is disclosed as a circuit for performing digital signal processing. Even in this case, however, since the number of elements using the CMOS structure increases and the number of steps of calculation processing increases, the above-described problems that the scale of circuitry increases, electric power consumption increases, and the calculation speed decreases remain.
SUMMARY OF THE INVENTION
The present invention has been made in consideration of the above-described problems.
It is an object of the present invention to provide a semiconductor device which can reduce the scale of circuitry, increase the calculation speed and reduce electric power consumption, and to provide a semiconductor circuit which uses such a device.
It is another object of the present invention to provide a semiconductor device which can perform calculation processing, such as majority determination or the like, and improve accuracy in calculation by a configuration using simple manufacturing processes, and to provide a semiconductor circuit which uses such a device.
It is still another object of the present invention to provide a semiconductor device which can perform parallel calculation processing for electric charges, and to provide a semiconductor circuit which uses such a device.
According to one aspect, the present invention which achieves these objectives relates to a semiconductor device comprising a charge transfer channel to one end of which electric charges supplied from charge supply means are input, and which includes a plurality of branching regions at an intermediate portion, a plurality of gate electrodes provided on the corresponding branching regions of the charge transfer channel via insulating films, input-signal supply means for supplying each of the gate electrodes with an input signal, a transfer electrode, provided on the charge transfer channel via a gate insulating film, for performing control so that the electric charges are transferred in a predetermined direction within the charge transfer channel, conversion means for converting the transferred electric charges into a voltage, and sense amplifier means to which an output signal from the conversion means is input, and to a semiconductor circuit which includes such a device.
According to another aspect, the present invention which achieves these objectives relates to a semiconductor device comprising a charge transfer channel to which electric charges are supplied from charge supply means and which includes a plurality of branching regions, a plurality of gate electrodes provided on the corresponding branching regions via insulating films, input-signal supply means for supplying each of the gate electrodes with an input signal, a transfer electrode, adjacent to the gate electrodes, for transferring electric charges in a predetermined direction within the charge transfer channel, and conversion means for coverting the electric charges transferred by the transfer electode into a voltage, and to a semiconductor circuit which includes such a device.
According to the present invention having above-described configurations, for example, the scale of circuitry can be reduced, the calculation speed can be increased, accuracy in calculation can be improved, and electric power consumption can be reduced.
A semiconductor circuit, such as a majority calculation circuit, a correlation calculation circuit or the like, including the semiconductor device of the present invention can reduce the capacity of a memory, and can, for example, further reduce the scale of circuitry, increase the calculation speed, improve accuracy in calculation, and reduce electric power consumption, by performing simpler calculation.
The foregoing and other objects, advantages and features of the present invention will become more apparent from the following description of the preferred embodiments taken in conjuction with the accompanying drawings.
REFERENCES:
patent: 3623132 (1971-11-01), Green
patent: 3806772 (1974-04-01), Early
patent: 3986180 (1976-10-01), Cade
patent: 4032767 (1977-06-01), Lagnado
patent: 4145676 (1979-03-01), Benoit-Gonin et al.
patent: 4195282 (1980-03-01), Cameron
patent: 4255715 (1981-03-01), Cooperman
patent: 4270144 (1981-05-01), Hartman et al.
patent: 4382187 (1983-05-01), Farleux et al.
patent: 4421996 (1983-12-01), Chuang et al.
patent: 4446438 (1984-05-01), Chang et al.
patent: 4584568 (1986-04-01), Zomorrodi
patent: 4588905 (1986-05-01), Kojima
patent: 4597012 (1986-06-01), Itoh et al.
patent: 4829382 (1989-05-01), Hess et al.
patent: 4870266 (1989-09-01), Ishizaki et al.
patent: 4872010 (1989-10-01), Larson et al.
patent: 4879470 (1989-11-01), Sugawa et al.
patent: 5008674 (1991-04-01), Da Franca et al.
patent: 5144447 (1992-09-01), Akimoto et al.
patent: 5162912 (1992-11-01), Ueno et al.
patent: 5184006 (1993-02-01), Ueno
patent: 5210434 (1993-05-01), Ohmi et al.
patent: RE34309 (1993-07-01), Tanaka et al.
patent: 5262870 (1993-11-01), Nakamura
patent: 5262871 (1993-11-01), Wilder et al.
patent: 5287108 (1994-02-01), Mayes et al.
patent: 5288988 (1994-02-01), Hashimoto et al.
patent: 5331222 (1994-07-01), Lin et al.
patent: 5337270 (1994-08-01), Kawata et al.
patent: 5341050 (1994-08-01), Mellissinos et al.
paten
Kochi Tetsunobu
Miyawaki Mamoru
Canon Kabushiki Kaisha
Fitzpatrick ,Cella, Harper & Scinto
Munson Gene M.
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