Charge transfer delay circuit for analog signals

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307221C, 307221D, 307304, H03K 513, G11C 1900, H03K 3353

Patent

active

040371190

ABSTRACT:
The area of an integrated delay line comprising charge transfer circuits (charge-coupled circuits and bucket brigade circuits) is minimized by arranging the stages in such a manner that between two longitudinal chains of stages there lie n/2 transversal chains, n being the number of stages of one longitudinal chain.

REFERENCES:
patent: 3764824 (1973-10-01), Sangster
patent: 3873851 (1975-03-01), Weimer
patent: 3913077 (1975-10-01), Erb
patent: 3914748 (1975-10-01), Barton et al.

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