Television – Camera – system and detail – Solid-state image sensor
Reexamination Certificate
1998-09-18
2003-05-13
Ho, Tuan (Department: 2612)
Television
Camera, system and detail
Solid-state image sensor
C348S308000
Reexamination Certificate
active
06563539
ABSTRACT:
Charge transfer circuit for an imaging array, an imaging array incorporating the same and a method of operating an imaging array incorporating the same.
This invention relates optical and infra-red imaging systems, and in particular to charge transfer circuits for use in such systems.
BACKGROUND OF THE INVENTION
Imaging detectors, e.g. infra-red image detectors for use in night vision equipment, have been constructed using a number of technologies and circuit techniques. Such detectors typically comprise an array of optical or infra-red sensitive elements coupled to image processing circuitry, the assembly generally being fabricated on a common semiconductor, e.g. silicon, substrate. The detectors employ a process in which photo-emission from a particular image point is represented by a respective photo-detector current of corresponding magnitude. This current is integrated over a period of time in a cyclic integration process in which the accumulated charge from each element of the detector array is stored in a corresponding storage element during each integration cycle. At the end of the cycle, the storage element may be discharged or reset ready for the next cycle. The storage elements can for example be realised as potential wells in bulk silicon controlled by field plates, such as in charge coupled device (CCD) technology, or as discrete capacitors in the more commonly employed CMOS or BiCMOS technologies.
In an attempt to improve signal to noise ratios in such imaging systems, the technique of time delay integration (TDI) has been introduced by a number of workers. This technique requires the controlled integration and transfer of charge along a TDI chain of active devices and storage elements. This has the effect of averaging noise or transient components in the accumulated charge, while the total signal charge increases in proportion to the number of detectors. This has the advantage of increasing the signal to noise ratio by a theoretical factor of n where n is the number of TDI stages in the chain.
A well established problem associated with imaging circuitry, particularly when employed for infra-red imaging is that of power dissipation. In order to reduce background noise to the minimum, the detector is cooled typically to the temperature of liquid nitrogen. It will be appreciated that the heating effect of the detector circuitry resulting from any excessive power dissipation will impair or negate the effects of cooling. Many workers have attempted to address this problem by the use of CMOS technology for the implementation of the TDI image read-out arrays. However, the unit gain stage amplifiers, which are needed in a conventional TDI array to transfer the accumulated charge from one stage to the next, suffer from two disadvantages when fabricated in CMOS technology. Firstly, each amplifier consumes power which, for a large array, results in a high total power dissipation. Secondly, CMOS amplifiers are inherently noisy at low frequencies and this partially negates the effectiveness if the TDI technique in overcoming the effects of background noise. For these reasons, further workers have investigated the use of bipolar semiconductor techniques.
The most commonly employed bipolar TDI arrays employ an analog shift register technique which is commonly referred to as a bucket brigade delay line. Such a technique is described for example by F L J Sangster et al. in IEEE Journal of Solid State Physics, Vol. SC-4, No. 3, June 1969, pp 131-136; and by G Krause in Electronics Letters, December, 1967, Vol. 3, No. 12, pp 544-546. Circuits of this type comprise a master and slave arrangement for each stage and use a two-phase clock for transferring charge between the master and slave circuits at each stage. While the use of bipolar circuitry significantly reduces the problem of electrical noise, the conventional bucket brigade arrangement suffers from two key limitations. Firstly, the dynamic range of the circuit is limited to about one half of the supply voltage which, for current bipolar processes is about 2.5 volts. This is because the clocking process causes both terminals of each charge storage element to rise in voltage by an amount equal to the sum of the maximum stored voltage and the bipolar transistor threshold voltage V
be
. Secondly, the maximum voltage to which the circuit can be subjected is limited by the reverse breakdown voltage of the bipolar emitter/base junctions. In addition, the resetting of the charge storage capacitors requires both additional circuitry and additional cycle time for each TDI stage.
In a conventional charge transfer or time delay integration circuit, operational amplifier buffers are used in combination with switches to transfer charge via a voltage transfer technique. Such an arrangement provides an effective signal to noise ratio improvement, but suffers from the disadvantage of the relatively high power requirements of the buffers and of the significant number of components required for the buffer fabrication, the latter being costly in terms of semiconductor chip area.
Reference is here directed to my co-pending application Ser. No. 08/827243 which relates to a charge conveyor circuit for a time delay integration,(TDI) imaging system. In that circuit, storage capacitors are employed for charge integration from the front end circuit. This eliminates the need for a sample and hold circuit at every front end stage.
SUMMARY OF THE INVENTION
An object of the invention is to minimise or to overcome the above disadvantages.
A further object of the invention is to provide an improved imaging system and array.
A further object of the invention is to provide a charge integration circuit construction that is fully compatible with CMOS processing technology.
According to a first aspect of the invention, there is provided a charge transfer circuit for an imaging array, the circuit comprising a plurality of concatenated charge transfer stages each incorporating; a charge storage element for storing accumulated charge generated by a photo-detector responsive to electromagnetic radiation incident thereon, a transfer element to which the charge storage element is coupled, a first voltage driver coupled to the storage element, a second voltage driver coupled to the transfer element, and control means for said first and second voltage drivers, wherein the control means is arranged to apply selectively respective potential conditions to the storage element and to the transfer element of a said stage of the array so as to transfer the accumulated charge stored in the storage element to the storage element of the next stage of the array.
According to a another aspect of the invention, there is provided an imaging array comprising a plurality of time delay integration (TDI) charge transfer chains each said chain being constituted by a plurality of concatenated charge transfer stages each incorporating; a charge storage element for storing accumulated charge generated by a photodetector responsive to electromagnetic radiation incident thereon, and a voltage controllable transfer element to which the charge storage element is coupled, the transfer element having a first non-conductive condition and a second conductive condition, wherein the imaging array incorporates a first set of voltage drivers each coupled to a respective storage element one in each said TDI chain, a second set of voltage drivers each coupled to a respective transfer element one in each said TDI chain, and control means for said first and second voltage drivers, wherein the control means is arranged to apply selectively to each stage of each TDI chain in sequential order respective potential conditions to the storage element of a said stage and to the transfer element of the immediately preceding stage of the array so as to drive the transfer element of said stage into its conductive condition and to maintain the transfer element of the preceding sage in its non-conductive condition thereby to effect transfer of the accumulated charge stored in the storage element of said stage to the st
Barnes & Thornburg
Ho Tuan
Nortel Networks Limited
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