Charge stacking on-chip high-voltage generator and method

Details Charge stacking on-chip high-voltage generator and method Charge stacking on-chip high-voltage generator and method

1994-09-16

1996-08-06

Shoop, Jr., William M.

Electrical transmission or interconnection systems

Capacitor

Parallel-charge, series-discharge

307109, 363 56, 363 60, H02M 318

Patent

active

055436684

ABSTRACT:
A charge stacking, high voltage generating circuit is provided wherein a plurality of capacitors are charged in parallel and discharged in series through a single diode to an output terminal. A switching circuit is used to connect each of the capacitors in parallel between a first supply voltage and a second supply voltage during a first half clock cycle. This configuration allows the capacitors to charge during this first half clock cycle. During a second half clock cycle, the switching circuit connects the charged capacitors in series between the first supply voltage and the output terminal through a single diode. The series configuration of the capacitors is such that the voltage at the output terminal is approximately equal to the first supply voltage, plus the sum of the voltages of the charged capacitors, minus the threshold voltage drop across the series diode.

REFERENCES:
patent: 4199806 (1980-04-01), Patterson
patent: 4223238 (1980-09-01), Parkinson
patent: 4673829 (1987-06-01), Gupta
John F. Dickson, "On-Chip High-Voltage Generation in MNOS Integrated Circuits Using an Improved Voltage Multiplier Technique," IEEE Journal of Solid-State Circuits, vol. SC-11, No. 3, Jun., 1976, pp. 374-378.
Witters, et al., "Analysis and Modeling of On-Chip High-Voltage Generator Circuits for Use in EEPROM Circuits," IEEE Journal of Solid-tate Circuits, vol. 24, No. 5, Oct., 1989, pp. 1372-1380.

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