Charge redistribution circuits

Communications: electrical – Audible indication – Percussion-type sound producer

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340347M, H03K 1302

Patent

active

041952820

ABSTRACT:
A charge redistribution circuit for pulse code modulation encoding suitable for use in apparatus for encoding voice in a companded code to maximize signal-to-noise performance. The companded code is the fifteen segment approximation of the .mu.255 compression law, wherein each segment contains 16 equal size steps. The circuit includes a single binary weighted capacitor array for the generation of both segment and step boundaries of voice being encoded. Each capacitor in the array has a pair of opposed plates, one plate of each capacitor being commonly coupled together. The circuit further includes a binary comparator having a first input adapted to be coupled to a reference bias potential and a second input coupled to the commonly coupled plates. First switching means connect and disconnect the commonly coupled plates to and from ground potential. Second switching means selectively connect a first common line to an input analog voice signal or to ground potential. Third switching means selectively connect a second common line to a predetermined reference voltage V.sub.ref or to a reference voltage V.sub.ref/16 (which is 1/16 the predetermined voltage), and selectively couple the first comparator input to ground potential or to the reference bias potential. Fourth switching means, including a switch for each capacitor, selectively couple the other plates of the capacitors to the first or to the second common line. An eight-bit code generator provides a digital eight-bit output upon receipt of a read instruction and control logic for controlling the four switching means, such logic being responsive to the output of the comparator and providing control signals to the generator. Simultaneously, it causes the third switching means to connect the first comparator input to ground when the sampled input signal lies in the upper four segments and it causes the third switching means to connect the first comparator input to a reference bias potential when the sampled input signal lies in the lower four segments.

REFERENCES:
patent: 4129863 (1978-12-01), Gray et al.
Abraham et al, Charge Redistribution Techniques for Multi-Channel PCM Encoding, International Conference on Communications, I.C.C., 12-15, Jun. 1977, pp.
Gray et al, Companded Pulse Code Modulation Voice Codec Using Monolithic Weighted Capacitor Arrays, IEEE Journal of Solid State Circuits, 12/1975, pp. 497-499.
Tsividis, Gray et al, An All-MOS Companded PCM Voice Encoder, IEEE International Solid-State Circuits Conference, 2/18/1976, pp. 24, 25.
Tsividis et al, A segmented .mu.-255 Law PCM Voice Encoder Utilizing NMOS Technology, IEEE Journal of Solid-State Circuits, vol. SC-11, No. 6, 12/1976, pp. 740-747.
McCreary et al, All-MOS Charge Redistribution Analog-to-Digital Conversion Techniques, Part I, IEEE Journal of Solid-State Circuits, vol. SC-10, 12/1975, pp. 371-379.
Suarez et al, All-MOS Charge Redistribution Analog-to-Digital Conversion Techniques, Part II, IEEE Journal of Solid-State Circuits, vol. SC-10, No. 6, 12/1975, pp. 379-385.
Henning et al, D2 Channel Bank:System Aspects, B.S.T.J., 10/1972, pp. 1641-1657.

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