Charge redistribution A/D converter with increased common mode r

Details Charge redistribution A/D converter with increased common mode r Charge redistribution A/D converter with increased common mode r

1987-08-11

1989-02-07

Sloyan, T. J.

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

307243, H03M 138

Patent

active

048034622

ABSTRACT:
An A/D converter includes a positive array of binary weighted capacitors with a common top plate (12) and a negative array of binary weighted capacitors with a common top plate (32). The positive and negative arrays are input to a differential amplifier (10) for measuring the differential voltage across the top plates. During the sample time, a differential input voltage is sampled on the bottom plates of the capacitors and the top plates of the capacitors are disposed at the common mode voltage of the input signal. This limits the input voltage across the capacitors to one-half the differential voltages of the input signal. During the hold mode and the redistribution mode, this presents a predetermined common mode input voltage to the amplifier (10) which is independent of the input signal.

REFERENCES:
patent: 3526888 (1970-09-01), Knox et al.
patent: 3940759 (1976-02-01), Zitelli et al.
patent: 4410880 (1983-10-01), Zaborowski
patent: 4661802 (1987-04-01), Yukawa

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