Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Patent
1996-09-30
1997-07-08
Callahan, Timothy P.
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Synchronizing
327112, 327111, 331 17, H03L 706
Patent
active
056465637
ABSTRACT:
A charge pump of a phase-locked loop includes a first P channel transistor and a first N channel transistor coupled to mirror a current in a constant current source. The P channel transistor and N channel transistor are formed with dimensions that match transient responses of currents through the N and P channel transistors during switching rather than matching the gains of the N and P channel transistors. In one embodiment, the channel length of the N channel transistor is twice a channel length of the P channel transistor. A second P channel transistor and a second N channel transistor connected in series with the first P and N channel transistors switch the current through the first P channel transistor and the first N channel transistor respectively. The second P channel transistor and the second N channel transistor have matched gate-drain capacitances so that they have the same switching speed. A first capacitor coupled between the gate of the first P channel transistor and a supply voltage and a second capacitor coupled between the gate of the first N channel transistor and a reference voltage reduce the effect that jitter in the supply and reference voltages has on the charge pump.
REFERENCES:
patent: 4922141 (1990-05-01), Lofgren et al.
patent: 5120992 (1992-06-01), Miller et al.
patent: 5155384 (1992-10-01), Ruetz
patent: 5208546 (1993-05-01), Nagaraj et al.
patent: 5362990 (1994-11-01), Alvarez et al.
Kim et al., "A 30-MHz Hybrid Analog/Digital Clock Recovery Circuit in 2-.mu.m CMOS;" IEEE Journal of Solid-State Circuits, vol. 25, No. 6, Dec. 1990, pp. 1385-1394.
Young et al., "WP3.3: A PLL Clock Generator With 5 to 110 MHz Lock Range for Microprocessors," ISSCC 92/ Session 3/High-Performance Circuits/Paper WP 3.3, IEEE Int'l Solid State Circuits Conference, pp. 50-51.
Sedra et al., Microelectronic Circuits, 1991, p. 932.
Callahan Timothy P.
Kim Jung Ho
Millers David T.
National Semiconductor Corporation
LandOfFree
Charge pump with near zero offset current does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Charge pump with near zero offset current, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Charge pump with near zero offset current will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2410859