Charge pump linearization technique for delta-sigma...

Oscillators – Automatic frequency stabilization using a phase or frequency... – Tuning compensation

Reexamination Certificate

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C331S034000, C331S17700V

Reexamination Certificate

active

07969247

ABSTRACT:
A delta-sigma fractional-N frequency synthesizer having a charge pump with error canceling circuitry eliminates a non-linear term from the charge pump transfer function. The charge pump includes a matched pair of charging current sources, each supplying a first current IP1to a common node, when enabled. The charge pump also includes a matched pair of discharging current sources, each sinking a second current IN1from the common node, when enabled. The error canceling circuitry includes a charging current source, which supplies a current equal to the second current IN1to the common node, when enabled. The error canceling circuitry also includes a discharging current source, which sinks a current equal to the first current IP1from the common node, when enabled. The charging and discharging current sources of the error canceling circuitry are both enabled when either one of the matched pairs of charging and discharging current sources is enabled.

REFERENCES:
patent: 5508660 (1996-04-01), Gersbach et al.
patent: 7005928 (2006-02-01), Albasini et al.
Jae-Shin Lee et al.; “A Charge Pump with Perfect Currrent Matching Characteristics in Phase-Locked Loops”; 5 pages; date unknown.
Sudhakar Pamarti; “A Wideband 2.4-GHz Delta-Sigma Fractional-N PLL With 1-Mb/s In-Loop Modulation”; IEEE, vol. 39, No. 1, Jan. 2004; 14 pages.
Enrico Temporiti et al.; “A 700-kHz Bandwidth Fractional Synthesizer With Spurs Compensation and Lineraization Techniques . . . ”; IEEE vol. 39, No. 9, Sep. 2004; 9 pages.
Bram De Muer et al.; “On the Analysis of Fractional-N Frequency Synthesizers for High-Spectral Purity”; IEEE, vol. 50, No. 11, Nov. 2003.

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