Charge pump for a low-voltage wide-tuning range phase-locked...

Details Charge pump for a low-voltage wide-tuning range phase-locked... Charge pump for a low-voltage wide-tuning range phase-locked...

2006-07-25

2006-07-25

Tra, Quan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

Reexamination Certificate

active

07081781

ABSTRACT:
A charge pump for a differential phase-locked loop (PLL) is provided. The charge pump includes a current switch configured to voltage to source and sink a current in a complementary fashion from a pair of differential output nodes. The charge pump includes a common-mode feedback loop to maintain the charging and discharging of the differential output nodes with respect to a common-mode voltage. Transconductance amplifiers are provided within the common-mode feedback loop to provide greater dynamic range to the charging and discharging of the differential output nodes.

REFERENCES:
patent: 6275097 (2001-08-01), Liang et al.
patent: 6292061 (2001-09-01), Qu
patent: 6498538 (2002-12-01), Qu et al.
patent: 6686794 (2004-02-01), Abidin et al.
patent: 2005/0024112 (2005-02-01), Keaveney
ISSCC 2003/Session 24/Clock Generation/Paper 24.1, 2003 IEEE International Solid-State Circuits Conference.
“Differential CMOS Circuits for 622-MHz/933-MHz Clock And Data Recovery Applications,” by Hormoz Djahanshahi et al., IEEE Journal of Solid-State Circuits, vol. 35, No. 6, Jun. 2000.

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