Electric power conversion systems – Current conversion – With voltage multiplication means
Reexamination Certificate
2002-06-19
2004-04-06
Sterrett, Jeffrey (Department: 2838)
Electric power conversion systems
Current conversion
With voltage multiplication means
C363S060000
Reexamination Certificate
active
06717829
ABSTRACT:
The invention relates to charge pump circuits, as for instance found in voltage regulators and power supplies, and more particularly to a voltage and/or current control device for a charge pump circuit.
Charge pump circuits are used to provide boosted voltages from lower input voltages in integrated circuits when there is a need for such a boosted voltage to feed as required an internal sub-circuit and/or a coupled external circuit requiring a voltage which is higher than the supply voltage which is supplied otherwise.
In a known solution, the output supply obtained from a charge pump circuit is submitted to an on-off regulation triggered from a comparator circuit. This comparator circuit controls charge pump circuit switch elements in order to have a required boosted voltage provided at an output of the charge pump circuit, as long as the voltage at this output does not exceed a determined first threshold value. It also controls the charge pump circuit switch elements in order to have a high impedance at the charge pump circuit output when the output voltage exceeds the first threshold value and as long as this output voltage remains higher than a second threshold value, smaller than the first threshold value. Such an on-off regulation involving successive switching operations generates spurious signals and more particularly spurious low frequency electromagnetic signals. Furthermore hysteresis is associated with the use of two voltage threshold values and it induces spurious output voltage ripples.
An object of this invention, therefore, is to provide an improved charge pump circuit supplying a boosted output voltage from an input DC voltage. Such a circuit includes capacitors with a first capacitor to which the input voltage is periodically applied for a determined first time by means of switch elements of a first switch module and another capacitor to which the charge from the first capacitor is periodically transmitted by means of switch elements of a second switch module which are switched on for a determined second time which is included between two successive first times. Said another capacitor is connected, on one side, to an input terminal receiving the input voltage and, on the other side, to an output terminal providing the boosted output voltage.
According to the invention, the charge pump circuit comprises a control device for controlling the charge transmitted to the first capacitor during said first times according to a determined reference voltage and the charge transmitted from the first capacitor to the second capacitor during said second times according to the voltage obtained at the output terminal.
An embodiment of a charge pump circuit according to the invention, comprises a control device including a common control means for controlling the charges respectively transmitted to the first capacitor and between the first and the other capacitor, said means being activated under a control according to the reference voltage during said first times and under a control according to the boosted output voltage during said second times.
Common control means are preferably inserted between the input terminal receiving the input voltage and a junction point which is common to two switch elements respectively connected each on a different side of capacitor which are alternatively switched on either during first times for one or during second times for the other.
According to a preferred embodiment, common control means corresponds to a transistor having a gate linked by a further switch element of the first switch module to a terminal providing said reference voltage and by another switch element of the second switch module to the output terminal.
REFERENCES:
patent: 5132895 (1992-07-01), Kase
patent: 5339236 (1994-08-01), Tamagawa
patent: 5596489 (1997-01-01), Bazes
patent: 5712777 (1998-01-01), Nicollini et al.
patent: 5923204 (1999-07-01), Rapeli et al.
patent: 6043998 (2000-03-01), Hirashima et al.
patent: 0 700 146 (1996-03-01), None
patent: 0 841 629 (1998-05-01), None
Patent Abstracts of Japan, vol. 1998, No. 8, Jun. 30, 1998 & JP 10 075567 A, Mar. 17, 1998.
Alcatel
Sterrett Jeffrey
Sughrue & Mion, PLLC
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