Charge pump clock generating circuit and method thereof

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Clock or pulse waveform generating

Reexamination Certificate

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C327S298000

Reexamination Certificate

active

07397294

ABSTRACT:
A charge pump clock generating circuit and a method thereof are disclosed. The circuit includes a sync counter, a comparator, and a clock generating circuit. The sync counter receives a dot clock and a reset signal for accumulating a counting value according to the dot clock and resetting the counting value to a starting value when the reset signal is enabled. The comparator receives the counting value and outputs the reset signal when the counting value is greater than or equal to a preset value. The clock generating circuit receives a display clock and the reset signal and outputs a charge pump clock. The clock generating circuit transforms the logic state of the charge pump clock when the reset signal is enabled, and sets the charge pump clock to a first preset logic state when the display clock is transformed from a first state to a second state.

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patent: 5929711 (1999-07-01), Ito
patent: 6020879 (2000-02-01), Nakabayashi
patent: 6356314 (2002-03-01), Takebe
patent: 6750693 (2004-06-01), Duewer
patent: 6822645 (2004-11-01), Noritake et al.
patent: 7106118 (2006-09-01), Tang et al.
patent: 2006/0132418 (2006-06-01), Morita

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