Charge pump clock for non-volatile memories

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Rectangular or pulse waveform width control

Reexamination Certificate

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C327S024000, C327S113000

Reexamination Certificate

active

07071748

ABSTRACT:
A charge pump clock for a memory device wherein pump clock signals are generated at an adaptive rate. The circuit of the present invention generates clock edges at a minimum of TDseconds apart so long as address transitions do not exceed a pre-determined limit. However, if address changes are occurring more frequently than this limit, i.e., 1/(2*TD), then clock edges will be generated at a rate that is proportional to the rate of address changes, where TDis approximately half of the address period. Two logic rules are implemented in hardware or equivalent software to make the clock signal adjustments.

REFERENCES:
patent: 6560145 (2003-05-01), Martines et al.
patent: 6778454 (2004-08-01), Duh et al.
patent: 2005/0018514 (2005-01-01), Knaack et al.

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