Charge pump circuit for memory device

Details Charge pump circuit for memory device Charge pump circuit for memory device

1998-08-07

2000-01-04

Nelms, David

Static information storage and retrieval

Powering

36518909, 36518906, 36518911, 327536, G11C 700

Patent

active

060117435

ABSTRACT:
The present invention relates to a charge pump circuit for memory device, more particularly to a circuit charging cell capacitors or bitlines up to a full level of power supply voltage by means of compensating for the loss caused by the threshold voltages of memory transistors with the elevated potential higher than the power supply voltage.
The present invention includes an elevated potential terminal connected to an output capacitor, a level monitor connected to said elevated potential terminal wherein a certain range of voltage is divided into a plurality of voltage level intervals, and the level monitor generates a plurality of pumping enable signals corresponding to a plurality of the voltage level intervals, and a plurality of the pumping enable signals have different activated time one another, and the level monitor activates the pumping enable signals corresponding to the voltage level intervals to which the elevated potential belongs among the voltage level intervals by means of detecting the elevated potential, a pulse generator connected to the level monitor wherein the pulse generator generates a pulse signal, and wherein at least one of the pumping enable signals is activated, and a plurality of charge pump modules connected to the pulse generator wherein the charge pump modules are enabled by the pumping enable signals, and wherein the charge pump modules supplies the output capacitor with electric charge with pumping operation by the pulse signals.

REFERENCES:
patent: 5038325 (1991-08-01), Douglas et al.
patent: 5483486 (1996-01-01), Javanifard et al.
patent: 5774399 (1998-06-01), Kwon
patent: 5841725 (1998-11-01), Kang et al.

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