Charge pump circuit for high voltage generation

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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C327S537000, C363S060000

Reexamination Certificate

active

07741898

ABSTRACT:
A circuit and method are given, to realize a high efficiency voltage multiplier for integrated circuits generating an internal and flexible positive or negative high voltage on-chip supply voltage from low external positive or negative supply voltages or ground. Applying multi-phase control signals to voltage boost internal nodes allows for eliminating threshold voltage drop losses and thus improves the voltage pumping gain compared to circuits with diode-configured FETs of prior art. Making use of voltage signals from antecedent stages in order to bias the bulk of MOS transistors fabricated in triple-well technology enables relaxing of the gate oxide stress within high order stage MOS transistors. Such a method, called leap-frog bulk potential tracking method, makes MOS transistors from different stages exhibit about the same body effect, which is very important because MOS transistors of higher order stages now show the same performance as MOS transistors from lower order stages. Important also in terms of efficiency as the charge sharing speed of high order MOS transistors always dominates the total charge pump performance and the driving force of pumped currents, thus also allowing for a greater number of serially connectable stages overall or a smaller number necessary for a certain targeted output voltage.

REFERENCES:
patent: 5343088 (1994-08-01), Jeon
patent: 5886887 (1999-03-01), Jenq
patent: 6501325 (2002-12-01), Meng
patent: 6646493 (2003-11-01), Butler
patent: 6734717 (2004-05-01), Min
patent: 6878981 (2005-04-01), Eshel
patent: 6952129 (2005-10-01), Lin et al.
patent: 7023260 (2006-04-01), Thorp et al.
patent: 7030683 (2006-04-01), Pan et al.
patent: 2007/0096796 (2007-05-01), Firmansyah et al.
Dickson CP circuit proposed by J. Dickson in IEEE Journal of Solid-State Circuits (see J. F. Dickson, “On-Chip High-Voltage Generation in MNOS Integrated Circuits Using an Improved Voltage Multiplier Technique”, IEEE J. of Solid-state Circuits, vol. SC-11, No. 3, Jun. 1976, pp. 374-378, which is hereby incorporated by reference in its entirety) Dickson's architecture is a construction of diode-coupled switches and pumping capacitors responding to two complementary clock signals.
“A new charge pump circuit dealing with gate-oxide reliability issue in low-voltage processes”, Ker, et al., ISCAS IEEE, 2004, pp. I321-I324 describes the charge transfer switches can be turned on and turned off completely, so its pumping gain is much higher than the traditional designs.
“A new charge pump without degradation in threshold voltage due to body effect”, Shin , et al., IEEE journal of solid-state circuits, vol. 35, No. 8, Aug. 2000, pp. 1227-1230 describes a new charge pump with the controllable body voltage. By adjusting the body voltage, the back bias effect removed and the threshold voltage of the MOSFET used as a switch is kept constant. With no threshold voltage increase, higher output voltage than the conventional charge pump can be obtained in the proposed charge pump.
“MOS charge pumps for low-voltage operation”, Wu et al., IEEE journal of solid-state circuits, vol. 33, No. 4, Apr. 1998, pp. 592-597 describes a new MOS charge pumps utilizing the charge transfer switches (CTS's) to direct charge flow and generate boosted output voltage. Using the internal boosted voltage to backward control the CTS of a previous stage yields charge pumps that are suitable for low-voltage operation.

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