Charge pump circuit and slice level control circuit

Details Charge pump circuit and slice level control circuit Charge pump circuit and slice level control circuit

2008-06-04

2011-11-15

Donovan, Lincoln (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

C327S148000, C327S157000, C363S060000

Reexamination Certificate

active

08058923

ABSTRACT:
The invention provides a charge pump circuit which reduces rise time of an output current even when an input signal is of high frequency. PMOS1and PMOS2have gates connected to each other, and the gate of the PMOS1is connected to the drain thereof. A supply potential (Vdd) is applied to the sources of the PMOS1and the PMOS2, and the PMOS1and the PMOS2form a current mirror circuit. First and second switching elements and a first constant-current source are connected to the drain of the PMOS2. A connection point (a node) of the first switching element and the second switching element is connected to an output terminal. The drain of the PMOS1is connected to the first constant-current source through a third switching element, and connected to a second constant-current source through a fourth switching element.

REFERENCES:
patent: 5473283 (1995-12-01), Luich
patent: 6218900 (2001-04-01), Nolan
patent: 6407619 (2002-06-01), Tanaka
patent: 2005/0212597 (2005-09-01), Tsuchi
patent: 9-237459 (1997-09-01), None
patent: 10-0292574 (2001-03-01), None

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