Charge pump circuit and method for generating a bias voltage

Electric power conversion systems – Current conversion – With voltage multiplication means

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Details

307110, 327536, H02M 318, G05F 110, G05F 302

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active

060260033

ABSTRACT:
A charge pump (102) and method of charge pumping a low voltage (V.sub.DD)) to generate a higher voltage (V.sub.PP). A primary pump (160, 179, 180) receives complementary clock signals (CLK1, CLK2) that control charging and transfer cycles of the charge pump. During the charging cycle, a capacitor (150) stores a charge developed from the low voltage. On the transfer cycle, the charge is transferred to an output (138, 177, 178) through a switching transistor (152) disposed in a well region (202) to develop the higher voltage. A secondary pump (162, 187, 188) charge pumps the output voltage to generate a more positive bias voltage for biasing the well region to disable a parasitic PNP transistor of the switching transistor.

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K. Sawada et al., "An On-Chip High-Voltage Generator Circuit for EEPROMs with a Power Supply Voltage below 2V", 1995 Symposium on VLSI Circuits Digest Technical Papers, pp. 75-76.
P. Favrat et al., "An Improved Voltage Doubler in a Standard CMOS Technology", 1997 IEEE International Symposium on Circuits and Systems, Jun. 9-12, 1997, Hong Kong, pp. 249-252.

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