Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2007-06-26
2007-06-26
Dinh, Son (Department: 2824)
Static information storage and retrieval
Addressing
Sync/clocking
C327S148000, C327S157000, C327S390000, C257S299000, C375S374000
Reexamination Certificate
active
11174801
ABSTRACT:
A charge pump circuit is provided which outputs a high voltage by using a boosting circuit with a smaller number of stages. A diode is used to give a back-gate voltage for a MOS transistor composing the charge pump circuit, thereby minimizing a reduction in a boosted voltage due to an increase in the threshold voltage of the MOS transistor. In addition, a second MOS transistor is provided between the back gate of the MOS transistor and the ground (GND) such that in-phase clock signals are inputted to the gate of the second MOS transistor and the capacitor thereof.
REFERENCES:
patent: 5381051 (1995-01-01), Morton
patent: 5426333 (1995-06-01), Maeda
patent: 6198340 (2001-03-01), Ting et al.
patent: 6650569 (2003-11-01), Angelica et al.
patent: 6919596 (2005-07-01), Hara et al.
patent: 6927441 (2005-08-01), Pappalardo et al.
Adams & Wilks
Dinh Son
Seiko Instruments Inc.
Wendler Eric J.
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