Charge pump

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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Details

C327S112000

Reexamination Certificate

active

06469554

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to charge pumps. A charge pump is a circuit which may be switched to output a current pulse. Charge pumps may be used in sample and hold systems, particularly in sampled data systems such as a phase-locked loop (PLL). The present invention is particularly suitable for use in a PLL employed as a local oscillator in a mobile wireless communication system such as a mobile telephone where low-power, high-speed circuits are needed.
A known circuit for a charge pump
1
is illustrated in FIG.
1
. This charge pump uses a current mirror including a reference current source
2
to supply a reference current to a diode-connected logging transistor
3
, the gate of which is connected to the gate of a mirror transistor
4
so that an image of the reference current flows through the mirror transistor
4
.
The drain of the mirror transistor
4
is connected through a first diode
5
to the output terminal
6
and through a second diode
7
to the drain of a switching transistor
8
. The gate of the switch transistor
8
is supplied with a switching signal for switching the output of the charge pump at the output terminal
6
. When the switching transistor
8
is switched on (by the switching signal going low), it sinks the output current from the mirror transistor
4
of the current mirror. When the switching transistor
8
is switched off (by the switching signal going high), the mirror transistor
4
drives a negative current at the output terminal
6
.
However, the charge pump
1
illustrated in
FIG. 1
has a high power consumption, because even when the charge pump
1
is switched off current flows through the mirror transistor
4
and the switch transistor
8
. This is undesirable, particularly in a battery-operated circuit where efficiency is important. In use, the charge pump
1
is combined with another charge pump (not shown) for supplying a positive current pulse to the output terminal
6
. In this case, the circuit of charge pump
1
also suffers from poor output current matching between the two charge pumps as the voltage range at the output terminal is traversed due to Early Effect in the mirror transistors.
FIG. 2
illustrates a charge pump
9
having an improved efficiency over the charge pump
1
of FIG.
1
. The charge pump
9
is again based on a current mirror including a reference current source
10
supplying a reference current to the drain of a diode-connected logging transistor
11
, the gate of which is connected to the gate of a mirror transistor
12
to mirror an image of the reference current through the mirror transistor
12
.
To provide switching, a series switch transistor
13
is connected in series with the mirror transistor
12
between the source of the mirror transistor
12
and the supply rail. A switching signal is supplied to the gate of the switching transistor
13
to switch the output current flowing through the mirror transistor
12
. A dummy switch transistor
14
is connected in series with the logging transistor
11
to bias the logging transistor
11
by the same voltage as the mirror transistor
12
and hence allow proper operation of the current mirror.
A cascode transistor
15
is connected in series between the drain of the mirror transistor
12
and the output terminal
16
. The cascode device minimises Early Effect in the mirror transistor
12
because changes in the voltage at the output terminal
16
have little effect on the voltage at the drain of the mirror transistor
12
.
However, the charge pump
9
illustrated in
FIG. 2
has two limitations. Firstly, the source of the mirror transistor
12
is uncontrolled during and after the on-to-off transition. Initial switch-off is fast, but becomes progressively slower as the charge on the source node of the mirror transistor
12
drains through the mirror transistor
12
into the source of the cascode transistor
15
. After the current through the cascode transistor
15
and the mirror transistor
12
has been switched substantially off, any residual charge leaks onto the output terminal as a residual leakage current which is undesirable. When the charge pump
9
is used in a PLL, such leakage current manifests itself as a series of unwanted harmonic spurs related to the comparison frequency. This becomes particularly problematic at high temperatures and at low comparison frequencies.
Secondly, when the charge pump
9
of
FIG. 2
is implemented in a typical CMOS technology, switching transients are injected into the surrounding circuitry via the substrate (and/or well for the PMOS devices) due to the source and drain diffusion capacitance.
Typically, a pair of charge pumps are used to output a current of positive and negative polarity, respectively. One of the charge pumps has the configuration illustrated in
FIG. 1
or
2
to output a current pulse of negative polarity the other charge pump (not shown) has the same configuration but implemented using PMOS transistors instead of NMOS transistors and is connected to the output terminal to output a current of positive polarity.
Known charge pump pairs when used to control a sample data system suffer from the problem that comparison related spurii occur particularly during high-speed operation. When a charge pump pair is used in a PLL, for example, the result is that the settle time has to be increased to minimise spurii.
SUMMARY OF THE INVENTION
According to a first aspect of the present invention, there is provided a charge pump pair comprising two charge pumps switchable to output a current of positive and negative polarity, respectively, wherein the charge pumps are relatively scaled to equalise at least one of: the rise time constants of the transient outputs of the charge pumps when switched on; and the fall time constants of the transient outputs of the charge pumps when switched off.
The first aspect of the present invention serves to reduce the generation of comparison related spurii particularly for operation of high speeds. This aspect of the invention is based on an appreciation that the major contribution to comparison related spurii is the mismatch between the charge areas of the transients of the output current pulses from the two charge pumps. For example,
FIG. 3
illustrates by the continuous line
17
and the dotted line
18
the magnitudes of positive and negative current pulses, respectively, when unmatched charge pumps are switched on at time t
1
and switched off at time t
2
. As the negative current pulse has a faster rise time and a slower fall time, the charge area of the negative current pulse is less than the charge area of the positive current pulse by an amount equal the total of the shaded areas
19
and
20
. However, by relatively scaling the charge pump according to the first aspect of the present invention the rise and fall times may be matched, hence equalising the charge areas of the positive and negative current pulses.
The first aspect of the present invention may be applied to a charge pump pair wherein each charge pump comprises a current mirror including a reference current source, a logging transistor circuit supplied with a reference current from the reference current source and a mirror transistor circuit, the control input of the mirror transistor circuit being connected to the control input of the logging transistor circuit to mirror an image of the reference current to the output of the mirror transistor circuit as the output of the charge pump and a clamp circuit switchable to selectively clamp the control input of the mirror transistor circuit to switch the output of the mirror transistor circuit on and off.
The logging transistor circuits and mirror transistor circuits of the two charge pumps may be formed by field-effect transistors. In that case, to equalise the rise time constants of the transients of the charge pumps when switched on the reference currents of the respective current mirrors of the two charge pumps are relatively scaled by the same ratio as the capacitances of the respective control inputs of the two charge pum

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